2022-02-06 16:26:45 +01:00
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// Copyright 2021 IOsetting <iosetting(at)outlook.com>
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef ___FW_USB_H___
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#define ___FW_USB_H___
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#include "fw_conf.h"
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#include "fw_types.h"
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/**
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2022-02-08 18:14:06 +01:00
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* STC8H8K64U USB SFR
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2022-02-06 16:26:45 +01:00
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*/
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#define FADDR 0x00
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#define POWER 0x01
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#define INTRIN1 0x02
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#define EP5INIF 0x20
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#define EP4INIF 0x10
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#define EP3INIF 0x08
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#define EP2INIF 0x04
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#define EP1INIF 0x02
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#define EP0IF 0x01
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#define INTROUT1 0x04
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#define EP5OUTIF 0x20
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#define EP4OUTIF 0x10
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#define EP3OUTIF 0x08
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#define EP2OUTIF 0x04
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#define EP1OUTIF 0x02
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#define INTRUSB 0x06
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#define SOFIF 0x08
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#define RSTIF 0x04
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#define RSUIF 0x02
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#define SUSIF 0x01
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#define INTRIN1E 0x07
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#define EP5INIE 0x20
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#define EP4INIE 0x10
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#define EP3INIE 0x08
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#define EP2INIE 0x04
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#define EP1INIE 0x02
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#define EP0IE 0x01
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#define INTROUT1E 0x09
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#define EP5OUTIE 0x20
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#define EP4OUTIE 0x10
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#define EP3OUTIE 0x08
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#define EP2OUTIE 0x04
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#define EP1OUTIE 0x02
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#define INTRUSBE 0x0B
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#define SOFIE 0x08
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#define RSTIE 0x04
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#define RSUIE 0x02
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#define SUSIE 0x01
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#define FRAME1 0x0C
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#define FRAME2 0x0D
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#define INDEX 0x0E
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#define INMAXP 0x10
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#define CSR0 0x11
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2022-02-09 05:39:39 +01:00
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#define SSUEND 0x80 // Serviced Setup End
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#define SOPRDY 0x40 // Serviced OPRDY(Out Packet Ready)
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#define SDSTL 0x20 // Send Stall
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#define SUEND 0x10 // Setup End
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#define DATEND 0x08 // Data End
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#define STSTL 0x04 // Sent Stall
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#define IPRDY 0x02 // In Packet Ready
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#define OPRDY 0x01 // Out Packet Ready
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#define INCSR1 0x11
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#define INCLRDT 0x40
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#define INSTSTL 0x20
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#define INSDSTL 0x10
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#define INFLUSH 0x08
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#define INUNDRUN 0x04
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#define INFIFONE 0x02
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#define INIPRDY 0x01
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#define INCSR2 0x12
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#define INAUTOSET 0x80
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#define INISO 0x40
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#define INMODEIN 0x20
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#define INMODEOUT 0x00
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#define INENDMA 0x10
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#define INFCDT 0x08
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#define OUTMAXP 0x13
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#define OUTCSR1 0x14
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#define OUTCLRDT 0x80
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#define OUTSTSTL 0x40
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#define OUTSDSTL 0x20
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#define OUTFLUSH 0x10
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#define OUTDATERR 0x08
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#define OUTOVRRUN 0x04
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#define OUTFIFOFUL 0x02
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#define OUTOPRDY 0x01
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#define OUTCSR2 0x15
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#define OUTAUTOCLR 0x80
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#define OUTISO 0x40
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#define OUTENDMA 0x20
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#define OUTDMAMD 0x10
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#define COUNT0 0x16
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#define OUTCOUNT1 0x16
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#define OUTCOUNT2 0x17
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#define FIFO0 0x20
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#define FIFO1 0x21
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#define FIFO2 0x22
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#define FIFO3 0x23
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#define FIFO4 0x24
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#define FIFO5 0x25
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#define UTRKCTL 0x30
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#define UTRKSTS 0x31
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2022-02-08 18:14:06 +01:00
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typedef enum _CONTROL_STATE
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{
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USB_CtrlState_Idle = 0x00,
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USB_CtrlState_SettingUp = 0x01,
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USB_CtrlState_DataIn = 0x02,
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USB_CtrlState_DataOut = 0x03,
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USB_CtrlState_Stalled = 0x04,
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} USB_CtrlState_t; /* The state machine states of a control pipe */
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typedef enum
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{
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USB_StdReq_GetStatus = 0x00,
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USB_StdReq_ClearFeature = 0x01,
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USB_StdReq_SetFeature = 0x03,
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USB_StdReq_SetAddress = 0x05,
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USB_StdReq_GetDescriptor = 0x06,
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USB_StdReq_SetDescriptor = 0x07,
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USB_StdReq_GetConfiguration = 0x08,
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USB_StdReq_SetConfiguration = 0x09,
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USB_StdReq_GetInterface = 0x0A,
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USB_StdReq_SetInterface = 0x0B,
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USB_StdReq_SynchFrame = 0x0C,
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} USB_StdReq_t;
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typedef enum
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{
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USB_HidReq_GetReport = 0x01,
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USB_HidReq_GetIdle = 0x02,
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USB_HidReq_GetProtocol = 0x03,
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USB_HidReq_SetReport = 0x09,
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USB_HidReq_SetIdle = 0x0A,
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USB_HidReq_SetProtocol = 0x0B,
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} USB_HidReq_t;
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2022-02-08 18:14:06 +01:00
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typedef enum
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{
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USB_DescriptorType_Device = 0x01,
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USB_DescriptorType_Configuration = 0x02,
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USB_DescriptorType_String = 0x03,
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USB_DescriptorType_Interface = 0x04,
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USB_DescriptorType_Endpoint = 0x05,
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USB_DescriptorType_HID = 0x21,
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USB_DescriptorType_Report = 0x22,
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USB_DescriptorType_Physical = 0x23,
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} USB_DescriptorType_t;
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#define REQUEST_TYPE_MASK 0x60
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typedef enum
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{
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USB_RequestType_Standard = 0x00,
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USB_RequestType_Class = 0x20,
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USB_RequestType_Vendor = 0x40,
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} USB_RequestType_t;
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2022-02-06 16:26:45 +01:00
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2022-02-07 18:11:50 +01:00
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typedef enum
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{
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USB_ClockSource_6M = 0x00,
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USB_ClockSource_12M = 0x01, // default value
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USB_ClockSource_24M = 0x02,
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USB_ClockSource_IRCDiv2 = 0x03,
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} USB_ClockSource_t;
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typedef enum
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{
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USB_PHYTest_Method_Normal = 0x00,
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USB_PHYTest_Method_Force1 = 0x01,
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USB_PHYTest_Method_Force0 = 0x02,
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USB_PHYTest_Method_ForceOneEnd0 = 0x03,
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} USB_PHYTest_Method_t;
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#define USB_SetClockPPL(__STATE__) SFR_ASSIGN(USBCLK, 7, __STATE__)
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#define USB_SetClockSource(__SOURCE__) SFR_ASSIGN2BIT(USBCLK, 5, __SOURCE__)
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#define USB_SetClockCRE(__STATE__) SFR_ASSIGN(USBCLK, 4, __STATE__)
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#define USB_SetUSBTestMode(__STATE__) SFR_ASSIGN(USBCLK, 3, __STATE__)
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#define USB_SetPHYTestMode(__STATE__) SFR_ASSIGN(USBCLK, 2, __STATE__)
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#define USB_SetPHYTestMethod(__TEST_METHOD__) SFR_ASSIGN2BIT(USBCLK, 0, __TEST_METHOD__)
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#define USB_SetEnabled(__STATE__) SFR_ASSIGN(USBCON, 7, __STATE__)
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#define USB_TurnOnReset() SFR_SET(USBCON, 6)
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#define USB_TurnOffReset() SFR_RESET(USBCON, 6)
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#define USB_SetPS2Mode(__STATE__) SFR_ASSIGN(USBCON, 5, __STATE__)
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/**
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* Enable/Disable 1.5KR pull up resistance on D+ and D-
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*/
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#define USB_SetDpDmPullUp(__STATE__) SFR_ASSIGN(USBCON, 4, __STATE__)
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/**
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* Enable/Disable 500KR pull down resistance on D+ and D-
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*/
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#define USB_SetDpDmPullDown(__STATE__) SFR_ASSIGN(USBCON, 3, __STATE__)
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#define USB_GetDiffRecvMode() (USBCON & 0x04)
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/**
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* Read D+ level
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*/
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#define USB_GetDp() (USBCON & 0x02)
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/**
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* Write D+ level, writable when PS2 mode is 1
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*/
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#define USB_SetDp(__STATE__) SFR_ASSIGN(USBCON, 1, __STATE__)
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/**
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* Read D- level
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*/
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#define USB_GetDm() (USBCON & 0x01)
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/**
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* Write D- level, writable when PS2 mode is 1
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*/
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#define USB_SetDm(__STATE__) SFR_ASSIGN(USBCON, 0, __STATE__)
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2022-02-07 19:45:04 +01:00
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#define USB_IsBusy() (USBADR & 0x80)
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#define USB_SetAddrForRead(__ADDR__) (USBADR = (__ADDR__) | 0x80)
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#define USB_SetAddrForWrite(__ADDR__) (USBADR = (__ADDR__) & 0x7F)
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#define USB_SelectEndPoint(__INDEX__) USB_WriteReg(INDEX, __INDEX__)
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typedef union
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{
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uint16_t w;
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struct _bb
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{
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uint8_t bl;
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uint8_t bh;
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} bb;
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} uint16_2uint8_t;
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2022-02-09 07:59:29 +01:00
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typedef struct
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{
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uint8_t bmRequestType;
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uint8_t bRequest;
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uint16_2uint8_t wValue;
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uint16_2uint8_t wIndex;
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uint16_2uint8_t wLength;
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2022-02-09 07:59:29 +01:00
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} USB_Request_t;
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typedef struct
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{
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uint8_t bStage;
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uint16_t wResidue;
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uint8_t *pData;
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2022-02-09 07:10:27 +01:00
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} USB_EP0_Stage_t;
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2022-02-06 16:26:45 +01:00
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uint8_t USB_ReadReg(uint8_t addr);
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void USB_WriteReg(uint8_t addr, uint8_t dat);
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uint8_t USB_ReadFIFO(uint8_t fifo, uint8_t *pdat);
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void USB_WriteFIFO(uint8_t fifo, uint8_t *pdat, uint8_t cnt);
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#endif
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