opt: fix warnings
This commit is contained in:
parent
5e6f6ca4f7
commit
1dc7666b27
@ -25,7 +25,7 @@ __XDATA uint8_t HidFreature[64];
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__XDATA uint8_t HidInput[64];
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__XDATA uint8_t HidOutput[64];
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usb_request_t usb_request;
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EP0STAGE Ep0Stage;
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USB_EP0_Stage_t USB_EP0_Stage;
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void USB_Init();
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uint8_t CalCheckSum(uint8_t *buf, uint8_t len);
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@ -63,7 +63,7 @@ void USB_Init()
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USB_WriteReg(INTROUT1E, 0x3f);
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USB_WriteReg(INTRUSBE, 0x00);
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USB_WriteReg(POWER, 0x01);
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Ep0Stage.bStage = USB_CtrlState_Idle;
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USB_EP0_Stage.bStage = USB_CtrlState_Idle;
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EXTI_USB_SetIntState(HAL_State_ON);
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}
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@ -75,7 +75,7 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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uint8_t introut;
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uint8_t csr;
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uint8_t cnt;
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uint16_t len;
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uint16_t len = 0;
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intrusb = USB_ReadReg(INTRUSB);
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intrin = USB_ReadReg(INTRIN1);
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introut = USB_ReadReg(INTROUT1);
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@ -89,7 +89,7 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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USB_WriteReg(INCSR1, INCLRDT);
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USB_SelectEndPoint(1);
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USB_WriteReg(OUTCSR1, OUTCLRDT);
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Ep0Stage.bStage = USB_CtrlState_Idle;
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USB_EP0_Stage.bStage = USB_CtrlState_Idle;
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}
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/**
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@ -102,7 +102,7 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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if (csr & STSTL) // Sent Stall
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{
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USB_WriteReg(CSR0, csr & ~STSTL);
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Ep0Stage.bStage = USB_CtrlState_Idle;
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USB_EP0_Stage.bStage = USB_CtrlState_Idle;
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}
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if (csr & SUEND) // Setup End
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@ -110,15 +110,15 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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USB_WriteReg(CSR0, csr | SSUEND);
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}
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switch (Ep0Stage.bStage)
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switch (USB_EP0_Stage.bStage)
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{
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case USB_CtrlState_Idle:
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if (csr & OPRDY) // Out Packet Ready
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{
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Ep0Stage.bStage = USB_CtrlState_SettingUp;
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USB_EP0_Stage.bStage = USB_CtrlState_SettingUp;
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USB_ReadFIFO(FIFO0, (uint8_t *)&usb_request);
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((uint8_t *)&Ep0Stage.wResidue)[0] = usb_request.wLength.bb.bh;
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((uint8_t *)&Ep0Stage.wResidue)[1] = usb_request.wLength.bb.bl;
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((uint8_t *)&USB_EP0_Stage.wResidue)[0] = usb_request.wLength.bb.bh;
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((uint8_t *)&USB_EP0_Stage.wResidue)[1] = usb_request.wLength.bb.bl;
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switch (usb_request.bmRequestType & REQUEST_TYPE_MASK)
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{
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case USB_RequestType_Standard:
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@ -139,16 +139,16 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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break;
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case USB_StdReq_GetDescriptor:
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Ep0Stage.bStage = USB_CtrlState_DataIn;
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USB_EP0_Stage.bStage = USB_CtrlState_DataIn;
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switch (usb_request.wValue.bb.bh)
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{
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case USB_DescriptorType_Device:
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Ep0Stage.pData = DEVICEDESC;
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USB_EP0_Stage.pData = (uint8_t *)DEVICEDESC;
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len = sizeof(DEVICEDESC);
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break;
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case USB_DescriptorType_Configuration:
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Ep0Stage.pData = CONFIGDESC;
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USB_EP0_Stage.pData = (uint8_t *)CONFIGDESC;
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len = sizeof(CONFIGDESC);
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break;
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@ -156,43 +156,43 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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switch (usb_request.wValue.bb.bl)
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{
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case 0:
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Ep0Stage.pData = LANGIDDESC;
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USB_EP0_Stage.pData = (uint8_t *)LANGIDDESC;
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len = sizeof(LANGIDDESC);
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break;
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case 1:
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Ep0Stage.pData = MANUFACTDESC;
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USB_EP0_Stage.pData = (uint8_t *)MANUFACTDESC;
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len = sizeof(MANUFACTDESC);
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break;
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case 2:
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Ep0Stage.pData = PRODUCTDESC;
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USB_EP0_Stage.pData = (uint8_t *)PRODUCTDESC;
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len = sizeof(PRODUCTDESC);
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break;
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default:
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Ep0Stage.bStage = USB_CtrlState_Stalled;
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USB_EP0_Stage.bStage = USB_CtrlState_Stalled;
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break;
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}
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break;
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case USB_DescriptorType_Report:
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Ep0Stage.pData = HIDREPORTDESC;
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USB_EP0_Stage.pData = (uint8_t *)HIDREPORTDESC;
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len = sizeof(HIDREPORTDESC);
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break;
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default:
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Ep0Stage.bStage = USB_CtrlState_Stalled;
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USB_EP0_Stage.bStage = USB_CtrlState_Stalled;
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break;
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}
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if (len < Ep0Stage.wResidue)
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if (len < USB_EP0_Stage.wResidue)
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{
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Ep0Stage.wResidue = len;
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USB_EP0_Stage.wResidue = len;
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}
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break;
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default:
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Ep0Stage.bStage = USB_CtrlState_Stalled;
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USB_EP0_Stage.bStage = USB_CtrlState_Stalled;
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break;
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}
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break;
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@ -201,33 +201,33 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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switch (usb_request.bRequest)
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{
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case USB_HidReq_GetReport:
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Ep0Stage.pData = HidFreature;
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Ep0Stage.bStage = USB_CtrlState_DataIn;
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USB_EP0_Stage.pData = HidFreature;
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USB_EP0_Stage.bStage = USB_CtrlState_DataIn;
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break;
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case USB_HidReq_SetReport:
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Ep0Stage.pData = HidFreature;
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Ep0Stage.bStage = USB_CtrlState_DataOut;
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USB_EP0_Stage.pData = HidFreature;
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USB_EP0_Stage.bStage = USB_CtrlState_DataOut;
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break;
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case USB_HidReq_SetIdle:
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break;
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case USB_HidReq_GetIdle:
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case USB_HidReq_GetProtocol:
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case USB_HidReq_SetProtocol:
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// case USB_HidReq_GetIdle:
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// case USB_HidReq_GetProtocol:
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// case USB_HidReq_SetProtocol:
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default:
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Ep0Stage.bStage = USB_CtrlState_Stalled;
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USB_EP0_Stage.bStage = USB_CtrlState_Stalled;
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break;
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}
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break;
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default:
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Ep0Stage.bStage = USB_CtrlState_Stalled;
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USB_EP0_Stage.bStage = USB_CtrlState_Stalled;
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break;
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}
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switch (Ep0Stage.bStage)
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switch (USB_EP0_Stage.bStage)
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{
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case USB_CtrlState_DataIn:
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USB_WriteReg(CSR0, SOPRDY);
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@ -240,12 +240,12 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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case USB_CtrlState_SettingUp:
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USB_WriteReg(CSR0, SOPRDY | DATEND);
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Ep0Stage.bStage = USB_CtrlState_Idle;
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USB_EP0_Stage.bStage = USB_CtrlState_Idle;
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break;
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case USB_CtrlState_Stalled:
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USB_WriteReg(CSR0, SOPRDY | SDSTL);
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Ep0Stage.bStage = USB_CtrlState_Idle;
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USB_EP0_Stage.bStage = USB_CtrlState_Idle;
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break;
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}
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}
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@ -255,14 +255,14 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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if (!(csr & IPRDY))
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{
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L_Ep0SendData:
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cnt = Ep0Stage.wResidue > 64 ? 64 : Ep0Stage.wResidue;
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USB_WriteFIFO(FIFO0, Ep0Stage.pData, cnt);
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Ep0Stage.wResidue -= cnt;
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Ep0Stage.pData += cnt;
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if (Ep0Stage.wResidue == 0)
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cnt = USB_EP0_Stage.wResidue > 64 ? 64 : USB_EP0_Stage.wResidue;
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USB_WriteFIFO(FIFO0, USB_EP0_Stage.pData, cnt);
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USB_EP0_Stage.wResidue -= cnt;
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USB_EP0_Stage.pData += cnt;
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if (USB_EP0_Stage.wResidue == 0)
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{
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USB_WriteReg(CSR0, IPRDY | DATEND);
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Ep0Stage.bStage = USB_CtrlState_Idle;
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USB_EP0_Stage.bStage = USB_CtrlState_Idle;
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}
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else
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{
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@ -274,13 +274,13 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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case USB_CtrlState_DataOut:
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if (csr & OPRDY)
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{
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cnt = USB_ReadFIFO(FIFO0, Ep0Stage.pData);
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Ep0Stage.wResidue -= cnt;
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Ep0Stage.pData += cnt;
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if (Ep0Stage.wResidue == 0)
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cnt = USB_ReadFIFO(FIFO0, USB_EP0_Stage.pData);
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USB_EP0_Stage.wResidue -= cnt;
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USB_EP0_Stage.pData += cnt;
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if (USB_EP0_Stage.wResidue == 0)
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{
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USB_WriteReg(CSR0, SOPRDY | DATEND);
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Ep0Stage.bStage = USB_CtrlState_Idle;
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USB_EP0_Stage.bStage = USB_CtrlState_Idle;
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}
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else
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{
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@ -47,7 +47,7 @@ __XDATA uint8_t HidFreature[64];
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__XDATA uint8_t HidInput[64];
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__XDATA uint8_t HidOutput[64];
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usb_request_t usb_request;
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EP0STAGE Ep0Stage;
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USB_EP0_Stage_t USB_EP0_Stage;
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void USB_Init(void);
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void KeyScan(void);
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@ -80,7 +80,7 @@ void main()
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if(B_1ms) // every 1 ms
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{
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B_1ms = 0;
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if(++cnt50ms >= 30) // scan every 30 ms
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if(++cnt50ms >= 50) // scan every 50 ms
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{
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cnt50ms = 0;
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KeyScan();
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@ -108,7 +108,7 @@ void USB_Init()
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USB_WriteReg(INTROUT1E, 0x3f);
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USB_WriteReg(INTRUSBE, 0x00);
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USB_WriteReg(POWER, 0x01);
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Ep0Stage.bStage = USB_CtrlState_Idle;
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USB_EP0_Stage.bStage = USB_CtrlState_Idle;
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EXTI_USB_SetIntState(HAL_State_ON);
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}
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@ -120,7 +120,7 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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uint8_t introut;
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uint8_t csr;
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uint8_t cnt;
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uint16_t len;
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uint16_t len = 0;
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intrusb = USB_ReadReg(INTRUSB);
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intrin = USB_ReadReg(INTRIN1);
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introut = USB_ReadReg(INTROUT1);
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@ -130,7 +130,7 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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USB_WriteReg(INCSR1, INCLRDT);
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USB_WriteReg(INDEX, 1);
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USB_WriteReg(OUTCSR1, OUTCLRDT);
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Ep0Stage.bStage = USB_CtrlState_Idle;
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USB_EP0_Stage.bStage = USB_CtrlState_Idle;
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}
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if (intrin & EP0IF)
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{
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@ -139,21 +139,21 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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if (csr & STSTL)
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{
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USB_WriteReg(CSR0, csr & ~STSTL);
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Ep0Stage.bStage = USB_CtrlState_Idle;
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USB_EP0_Stage.bStage = USB_CtrlState_Idle;
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}
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if (csr & SUEND)
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{
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USB_WriteReg(CSR0, csr | SSUEND);
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}
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switch (Ep0Stage.bStage)
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switch (USB_EP0_Stage.bStage)
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{
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case USB_CtrlState_Idle:
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if (csr & OPRDY)
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{
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Ep0Stage.bStage = USB_CtrlState_SettingUp;
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USB_EP0_Stage.bStage = USB_CtrlState_SettingUp;
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USB_ReadFIFO(FIFO0, (uint8_t *)&usb_request);
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((uint8_t *)&Ep0Stage.wResidue)[0] = usb_request.wLength.bb.bh;
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((uint8_t *)&Ep0Stage.wResidue)[1] = usb_request.wLength.bb.bl;
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((uint8_t *)&USB_EP0_Stage.wResidue)[0] = usb_request.wLength.bb.bh;
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((uint8_t *)&USB_EP0_Stage.wResidue)[1] = usb_request.wLength.bb.bl;
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switch (usb_request.bmRequestType & REQUEST_TYPE_MASK)
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{
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case USB_RequestType_Standard:
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@ -174,16 +174,16 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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break;
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case USB_StdReq_GetDescriptor:
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Ep0Stage.bStage = USB_CtrlState_DataIn;
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USB_EP0_Stage.bStage = USB_CtrlState_DataIn;
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switch (usb_request.wValue.bb.bh)
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{
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case USB_DescriptorType_Device:
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Ep0Stage.pData = DEVICEDESC;
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USB_EP0_Stage.pData = (uint8_t *)DEVICEDESC;
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len = sizeof(DEVICEDESC);
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break;
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case USB_DescriptorType_Configuration:
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Ep0Stage.pData = CONFIGDESC;
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USB_EP0_Stage.pData = (uint8_t *)CONFIGDESC;
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len = sizeof(CONFIGDESC);
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break;
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@ -191,43 +191,43 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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switch (usb_request.wValue.bb.bl)
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{
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case 0:
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Ep0Stage.pData = LANGIDDESC;
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USB_EP0_Stage.pData = (uint8_t *)LANGIDDESC;
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len = sizeof(LANGIDDESC);
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break;
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case 1:
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Ep0Stage.pData = MANUFACTDESC;
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USB_EP0_Stage.pData = (uint8_t *)MANUFACTDESC;
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len = sizeof(MANUFACTDESC);
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break;
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case 2:
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Ep0Stage.pData = PRODUCTDESC;
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USB_EP0_Stage.pData = (uint8_t *)PRODUCTDESC;
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len = sizeof(PRODUCTDESC);
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break;
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default:
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Ep0Stage.bStage = USB_CtrlState_Stalled;
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USB_EP0_Stage.bStage = USB_CtrlState_Stalled;
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break;
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}
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break;
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case USB_DescriptorType_Report:
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Ep0Stage.pData = HIDREPORTDESC;
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USB_EP0_Stage.pData = (uint8_t *)HIDREPORTDESC;
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len = sizeof(HIDREPORTDESC);
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break;
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default:
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Ep0Stage.bStage = USB_CtrlState_Stalled;
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USB_EP0_Stage.bStage = USB_CtrlState_Stalled;
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break;
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}
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if (len < Ep0Stage.wResidue)
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if (len < USB_EP0_Stage.wResidue)
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{
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Ep0Stage.wResidue = len;
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USB_EP0_Stage.wResidue = len;
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}
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break;
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default:
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Ep0Stage.bStage = USB_CtrlState_Stalled;
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USB_EP0_Stage.bStage = USB_CtrlState_Stalled;
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break;
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}
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break;
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@ -236,33 +236,33 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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switch (usb_request.bRequest)
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{
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case USB_HidReq_GetReport:
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Ep0Stage.pData = HidFreature;
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Ep0Stage.bStage = USB_CtrlState_DataIn;
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USB_EP0_Stage.pData = HidFreature;
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USB_EP0_Stage.bStage = USB_CtrlState_DataIn;
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break;
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case USB_HidReq_SetReport:
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Ep0Stage.pData = HidFreature;
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Ep0Stage.bStage = USB_CtrlState_DataOut;
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USB_EP0_Stage.pData = HidFreature;
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USB_EP0_Stage.bStage = USB_CtrlState_DataOut;
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break;
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case USB_HidReq_SetIdle:
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break;
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case USB_HidReq_GetIdle:
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case USB_HidReq_GetProtocol:
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case USB_HidReq_SetProtocol:
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// case USB_HidReq_GetIdle:
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// case USB_HidReq_GetProtocol:
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// case USB_HidReq_SetProtocol:
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default:
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Ep0Stage.bStage = USB_CtrlState_Stalled;
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USB_EP0_Stage.bStage = USB_CtrlState_Stalled;
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break;
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}
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break;
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default:
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Ep0Stage.bStage = USB_CtrlState_Stalled;
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USB_EP0_Stage.bStage = USB_CtrlState_Stalled;
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break;
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}
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switch (Ep0Stage.bStage)
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switch (USB_EP0_Stage.bStage)
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{
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case USB_CtrlState_DataIn:
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USB_WriteReg(CSR0, SOPRDY);
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@ -275,12 +275,12 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
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case USB_CtrlState_SettingUp:
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USB_WriteReg(CSR0, SOPRDY | DATEND);
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Ep0Stage.bStage = USB_CtrlState_Idle;
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USB_EP0_Stage.bStage = USB_CtrlState_Idle;
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break;
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|
||||
case USB_CtrlState_Stalled:
|
||||
USB_WriteReg(CSR0, SOPRDY | SDSTL);
|
||||
Ep0Stage.bStage = USB_CtrlState_Idle;
|
||||
USB_EP0_Stage.bStage = USB_CtrlState_Idle;
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -290,14 +290,14 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
|
||||
if (!(csr & IPRDY))
|
||||
{
|
||||
L_Ep0SendData:
|
||||
cnt = Ep0Stage.wResidue > 64 ? 64 : Ep0Stage.wResidue;
|
||||
USB_WriteFIFO(FIFO0, Ep0Stage.pData, cnt);
|
||||
Ep0Stage.wResidue -= cnt;
|
||||
Ep0Stage.pData += cnt;
|
||||
if (Ep0Stage.wResidue == 0)
|
||||
cnt = USB_EP0_Stage.wResidue > 64 ? 64 : USB_EP0_Stage.wResidue;
|
||||
USB_WriteFIFO(FIFO0, USB_EP0_Stage.pData, cnt);
|
||||
USB_EP0_Stage.wResidue -= cnt;
|
||||
USB_EP0_Stage.pData += cnt;
|
||||
if (USB_EP0_Stage.wResidue == 0)
|
||||
{
|
||||
USB_WriteReg(CSR0, IPRDY | DATEND);
|
||||
Ep0Stage.bStage = USB_CtrlState_Idle;
|
||||
USB_EP0_Stage.bStage = USB_CtrlState_Idle;
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -309,13 +309,13 @@ INTERRUPT(USB_Routine, EXTI_VectUSB)
|
||||
case USB_CtrlState_DataOut:
|
||||
if (csr & OPRDY)
|
||||
{
|
||||
cnt = USB_ReadFIFO(FIFO0, Ep0Stage.pData);
|
||||
Ep0Stage.wResidue -= cnt;
|
||||
Ep0Stage.pData += cnt;
|
||||
if (Ep0Stage.wResidue == 0)
|
||||
cnt = USB_ReadFIFO(FIFO0, USB_EP0_Stage.pData);
|
||||
USB_EP0_Stage.wResidue -= cnt;
|
||||
USB_EP0_Stage.pData += cnt;
|
||||
if (USB_EP0_Stage.wResidue == 0)
|
||||
{
|
||||
USB_WriteReg(CSR0, SOPRDY | DATEND);
|
||||
Ep0Stage.bStage = USB_CtrlState_Idle;
|
||||
USB_EP0_Stage.bStage = USB_CtrlState_Idle;
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -482,13 +482,13 @@ void KeyScan(void)
|
||||
else // start scan
|
||||
{
|
||||
// scan first line
|
||||
KeyIO = ~0x10;
|
||||
KeyIO = (uint8_t)~0x10;
|
||||
IO_KeyDelay();
|
||||
// save 4 keys status
|
||||
temp = KeyIO & 0x0F;
|
||||
|
||||
// second line
|
||||
KeyIO = ~0x20;
|
||||
KeyIO = (uint8_t)~0x20;
|
||||
IO_KeyDelay();
|
||||
// save 4 keys status
|
||||
temp |= KeyIO << 4;
|
||||
@ -497,12 +497,12 @@ void KeyScan(void)
|
||||
NewKeyCode = (~temp) & 0xFF;
|
||||
|
||||
// scan third line
|
||||
KeyIO = ~0x40;
|
||||
KeyIO = (uint8_t)~0x40;
|
||||
IO_KeyDelay();
|
||||
temp = KeyIO & 0x0F;
|
||||
|
||||
// scan 4th line
|
||||
KeyIO = ~0x80;
|
||||
KeyIO = (uint8_t)~0x80;
|
||||
IO_KeyDelay();
|
||||
temp |= KeyIO << 4;
|
||||
|
||||
|
@ -254,7 +254,7 @@ typedef struct
|
||||
uint8_t bStage;
|
||||
uint16_t wResidue;
|
||||
uint8_t *pData;
|
||||
} EP0STAGE;
|
||||
} USB_EP0_Stage_t;
|
||||
|
||||
|
||||
uint8_t USB_ReadReg(uint8_t addr);
|
||||
|
Loading…
Reference in New Issue
Block a user