2022-01-03 07:13:59 +01:00
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#ifndef __FW_REG_STC8H_H__
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#define __FW_REG_STC8H_H__
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2021-12-29 18:05:13 +01:00
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#include "fw_reg_base.h"
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2022-01-23 19:06:07 +01:00
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SFR(VRTRIM, 0xA6);
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2021-12-29 18:05:13 +01:00
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SFR(USBCLK, 0xDC);
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SFR(ADCCFG, 0xDE);
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SFR(IP3, 0xDF);
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SFR(P7M1, 0xE1);
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SFR(P7M0, 0xE2);
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SFR(DPS, 0xE3);
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SFR(DPL1, 0xE4);
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SFR(DPH1, 0xE5);
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SFR(CMPCR1, 0xE6);
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SFR(CMPCR2, 0xE7);
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2022-01-23 19:06:07 +01:00
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2021-12-29 18:05:13 +01:00
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SFR(USBDAT, 0xEC);
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SFR(IP3H, 0xEE);
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SFR(AUXINTIF, 0xEF);
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SFR(USBCON, 0xF4);
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SFR(IAP_TPS, 0xF5);
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SFR(USBADR, 0xFC);
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SFR(RSTCFG, 0xFF);
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2022-01-06 00:59:31 +01:00
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/**
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* Set B7 of P_SW2 before read/write the following registers
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*/
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2021-12-29 18:05:13 +01:00
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/////////////////////////////////////////////////
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//FF00H-FFFFH
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/////////////////////////////////////////////////
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/////////////////////////////////////////////////
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//FE00H-FEFFH
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/////////////////////////////////////////////////
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#define CKSEL (*(unsigned char volatile __XDATA *)0xfe00)
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#define CLKDIV (*(unsigned char volatile __XDATA *)0xfe01)
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#define HIRCCR (*(unsigned char volatile __XDATA *)0xfe02)
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#define XOSCCR (*(unsigned char volatile __XDATA *)0xfe03)
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#define IRC32KCR (*(unsigned char volatile __XDATA *)0xfe04)
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#define MCLKOCR (*(unsigned char volatile __XDATA *)0xfe05)
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#define IRCDB (*(unsigned char volatile __XDATA *)0xfe06)
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2022-02-06 16:26:45 +01:00
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#define IRC48MCR (*(unsigned char volatile __XDATA *)0xfe07)
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#define X32KCR (*(unsigned char volatile __XDATA *)0xfe08)
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#define RSTFLAG (*(unsigned char volatile __XDATA *)0xfe09)
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#define PxPU 0xfe10
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#define P0PU SFRX(PxPU + 0)
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#define P1PU SFRX(PxPU + 1)
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#define P2PU (*(unsigned char volatile __XDATA *)0xfe12)
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#define P3PU (*(unsigned char volatile __XDATA *)0xfe13)
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#define P4PU (*(unsigned char volatile __XDATA *)0xfe14)
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#define P5PU (*(unsigned char volatile __XDATA *)0xfe15)
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#define P6PU (*(unsigned char volatile __XDATA *)0xfe16)
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#define P7PU (*(unsigned char volatile __XDATA *)0xfe17)
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#define PxNCS 0xfe18
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#define P0NCS (*(unsigned char volatile __XDATA *)0xfe18)
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#define P1NCS (*(unsigned char volatile __XDATA *)0xfe19)
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#define P2NCS (*(unsigned char volatile __XDATA *)0xfe1a)
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#define P3NCS (*(unsigned char volatile __XDATA *)0xfe1b)
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#define P4NCS (*(unsigned char volatile __XDATA *)0xfe1c)
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#define P5NCS (*(unsigned char volatile __XDATA *)0xfe1d)
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#define P6NCS (*(unsigned char volatile __XDATA *)0xfe1e)
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#define P7NCS (*(unsigned char volatile __XDATA *)0xfe1f)
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#define PxSR 0xfe20
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#define P0SR (*(unsigned char volatile __XDATA *)0xfe20)
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#define P1SR (*(unsigned char volatile __XDATA *)0xfe21)
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#define P2SR (*(unsigned char volatile __XDATA *)0xfe22)
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#define P3SR (*(unsigned char volatile __XDATA *)0xfe23)
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#define P4SR (*(unsigned char volatile __XDATA *)0xfe24)
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#define P5SR (*(unsigned char volatile __XDATA *)0xfe25)
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#define P6SR (*(unsigned char volatile __XDATA *)0xfe26)
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#define P7SR (*(unsigned char volatile __XDATA *)0xfe27)
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#define PxDR 0xfe28
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#define P0DR (*(unsigned char volatile __XDATA *)0xfe28)
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#define P1DR (*(unsigned char volatile __XDATA *)0xfe29)
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#define P2DR (*(unsigned char volatile __XDATA *)0xfe2a)
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#define P3DR (*(unsigned char volatile __XDATA *)0xfe2b)
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#define P4DR (*(unsigned char volatile __XDATA *)0xfe2c)
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#define P5DR (*(unsigned char volatile __XDATA *)0xfe2d)
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#define P6DR (*(unsigned char volatile __XDATA *)0xfe2e)
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#define P7DR (*(unsigned char volatile __XDATA *)0xfe2f)
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#define PxIE 0xfe30
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#define P0IE (*(unsigned char volatile __XDATA *)0xfe30)
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#define P1IE (*(unsigned char volatile __XDATA *)0xfe31)
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#define P2IE (*(unsigned char volatile __XDATA *)0xfe32)
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#define P3IE (*(unsigned char volatile __XDATA *)0xfe33)
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#define P4IE (*(unsigned char volatile __XDATA *)0xfe34)
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#define P5IE (*(unsigned char volatile __XDATA *)0xfe35)
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#define P6IE (*(unsigned char volatile __XDATA *)0xfe36)
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#define P7IE (*(unsigned char volatile __XDATA *)0xfe37)
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#define LCMIFCFG (*(unsigned char volatile __XDATA *)0xfe50)
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#define RTCCR (*(unsigned char volatile __XDATA *)0xfe60)
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#define RTCCFG (*(unsigned char volatile __XDATA *)0xfe61)
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#define RTCIEN (*(unsigned char volatile __XDATA *)0xfe62)
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#define RTCIF (*(unsigned char volatile __XDATA *)0xfe63)
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#define ALAHOUR (*(unsigned char volatile __XDATA *)0xfe64)
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#define ALAMIN (*(unsigned char volatile __XDATA *)0xfe65)
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#define ALASEC (*(unsigned char volatile __XDATA *)0xfe66)
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#define ALASSEC (*(unsigned char volatile __XDATA *)0xfe67)
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#define INIYEAR (*(unsigned char volatile __XDATA *)0xfe68)
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#define INIMONTH (*(unsigned char volatile __XDATA *)0xfe69)
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#define INIDAY (*(unsigned char volatile __XDATA *)0xfe6a)
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#define INIHOUR (*(unsigned char volatile __XDATA *)0xfe6b)
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#define INIMIN (*(unsigned char volatile __XDATA *)0xfe6c)
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#define INISEC (*(unsigned char volatile __XDATA *)0xfe6d)
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#define INISSEC (*(unsigned char volatile __XDATA *)0xfe6e)
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#define YEAR (*(unsigned char volatile __XDATA *)0xfe70)
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#define MONTH (*(unsigned char volatile __XDATA *)0xfe71)
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#define DAY (*(unsigned char volatile __XDATA *)0xfe72)
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#define HOUR (*(unsigned char volatile __XDATA *)0xfe73)
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#define MIN (*(unsigned char volatile __XDATA *)0xfe74)
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#define SEC (*(unsigned char volatile __XDATA *)0xfe75)
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#define SSEC (*(unsigned char volatile __XDATA *)0xfe76)
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#define I2CCFG (*(unsigned char volatile __XDATA *)0xfe80)
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#define I2CMSCR (*(unsigned char volatile __XDATA *)0xfe81)
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#define I2CMSST (*(unsigned char volatile __XDATA *)0xfe82)
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#define I2CSLCR (*(unsigned char volatile __XDATA *)0xfe83)
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#define I2CSLST (*(unsigned char volatile __XDATA *)0xfe84)
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#define I2CSLADR (*(unsigned char volatile __XDATA *)0xfe85)
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#define I2CTXD (*(unsigned char volatile __XDATA *)0xfe86)
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#define I2CRXD (*(unsigned char volatile __XDATA *)0xfe87)
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#define I2CMSAUX (*(unsigned char volatile __XDATA *)0xfe88)
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#define TM2PS (*(unsigned char volatile __XDATA *)0xfea2)
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#define TM3PS (*(unsigned char volatile __XDATA *)0xfea3)
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#define TM4PS (*(unsigned char volatile __XDATA *)0xfea4)
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#define ADCTIM (*(unsigned char volatile __XDATA *)0xfea8)
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2021-12-31 13:02:01 +01:00
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/**
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* suppress xdata space memory overlap
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*/
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/*
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2021-12-29 18:05:13 +01:00
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#define PWM1_ETRPS (*(unsigned char volatile __XDATA *)0xfeb0)
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#define PWM1_ENO (*(unsigned char volatile __XDATA *)0xfeb1)
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#define PWM1_PS (*(unsigned char volatile __XDATA *)0xfeb2)
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#define PWM1_IOAUX (*(unsigned char volatile __XDATA *)0xfeb3)
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#define PWM2_ETRPS (*(unsigned char volatile __XDATA *)0xfeb4)
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#define PWM2_ENO (*(unsigned char volatile __XDATA *)0xfeb5)
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#define PWM2_PS (*(unsigned char volatile __XDATA *)0xfeb6)
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#define PWM2_IOAUX (*(unsigned char volatile __XDATA *)0xfeb7)
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#define PWM1_CR1 (*(unsigned char volatile __XDATA *)0xfec0)
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#define PWM1_CR2 (*(unsigned char volatile __XDATA *)0xfec1)
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#define PWM1_SMCR (*(unsigned char volatile __XDATA *)0xfec2)
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#define PWM1_ETR (*(unsigned char volatile __XDATA *)0xfec3)
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#define PWM1_IER (*(unsigned char volatile __XDATA *)0xfec4)
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#define PWM1_SR1 (*(unsigned char volatile __XDATA *)0xfec5)
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#define PWM1_SR2 (*(unsigned char volatile __XDATA *)0xfec6)
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#define PWM1_EGR (*(unsigned char volatile __XDATA *)0xfec7)
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#define PWM1_CCMR1 (*(unsigned char volatile __XDATA *)0xfec8)
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#define PWM1_CCMR2 (*(unsigned char volatile __XDATA *)0xfec9)
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#define PWM1_CCMR3 (*(unsigned char volatile __XDATA *)0xfeca)
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#define PWM1_CCMR4 (*(unsigned char volatile __XDATA *)0xfecb)
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#define PWM1_CCER1 (*(unsigned char volatile __XDATA *)0xfecc)
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#define PWM1_CCER2 (*(unsigned char volatile __XDATA *)0xfecd)
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2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWM1_CNTRH (*(unsigned char volatile __XDATA *)0xfece)
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#define PWM1_CNTRL (*(unsigned char volatile __XDATA *)0xfecf)
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#define PWM1_PSCRH (*(unsigned char volatile __XDATA *)0xfed0)
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#define PWM1_PSCRL (*(unsigned char volatile __XDATA *)0xfed1)
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#define PWM1_ARRH (*(unsigned char volatile __XDATA *)0xfed2)
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#define PWM1_ARRL (*(unsigned char volatile __XDATA *)0xfed3)
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#define PWM1_RCR (*(unsigned char volatile __XDATA *)0xfed4)
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#define PWM1_CCR1H (*(unsigned char volatile __XDATA *)0xfed5)
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#define PWM1_CCR1L (*(unsigned char volatile __XDATA *)0xfed6)
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#define PWM1_CCR2H (*(unsigned char volatile __XDATA *)0xfed7)
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#define PWM1_CCR2L (*(unsigned char volatile __XDATA *)0xfed8)
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#define PWM1_CCR3H (*(unsigned char volatile __XDATA *)0xfed9)
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#define PWM1_CCR3L (*(unsigned char volatile __XDATA *)0xfeda)
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#define PWM1_CCR4H (*(unsigned char volatile __XDATA *)0xfedb)
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#define PWM1_CCR4L (*(unsigned char volatile __XDATA *)0xfedc)
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#define PWM1_BKR (*(unsigned char volatile __XDATA *)0xfedd)
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#define PWM1_DTR (*(unsigned char volatile __XDATA *)0xfede)
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#define PWM1_OISR (*(unsigned char volatile __XDATA *)0xfedf)
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#define PWM2_CR1 (*(unsigned char volatile __XDATA *)0xfee0)
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#define PWM2_CR2 (*(unsigned char volatile __XDATA *)0xfee1)
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#define PWM2_SMCR (*(unsigned char volatile __XDATA *)0xfee2)
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#define PWM2_ETR (*(unsigned char volatile __XDATA *)0xfee3)
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#define PWM2_IER (*(unsigned char volatile __XDATA *)0xfee4)
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#define PWM2_SR1 (*(unsigned char volatile __XDATA *)0xfee5)
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#define PWM2_SR2 (*(unsigned char volatile __XDATA *)0xfee6)
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#define PWM2_EGR (*(unsigned char volatile __XDATA *)0xfee7)
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#define PWM2_CCMR1 (*(unsigned char volatile __XDATA *)0xfee8)
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#define PWM2_CCMR2 (*(unsigned char volatile __XDATA *)0xfee9)
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#define PWM2_CCMR3 (*(unsigned char volatile __XDATA *)0xfeea)
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#define PWM2_CCMR4 (*(unsigned char volatile __XDATA *)0xfeeb)
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#define PWM2_CCER1 (*(unsigned char volatile __XDATA *)0xfeec)
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#define PWM2_CCER2 (*(unsigned char volatile __XDATA *)0xfeed)
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#define PWM2_CNTRH (*(unsigned char volatile __XDATA *)0xfeee)
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#define PWM2_CNTRL (*(unsigned char volatile __XDATA *)0xfeef)
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#define PWM2_PSCRH (*(unsigned char volatile __XDATA *)0xfef0)
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#define PWM2_PSCRL (*(unsigned char volatile __XDATA *)0xfef1)
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2022-07-30 05:47:48 +02:00
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#define PWM2_ARRH (*(unsigned char volatile __XDATA *)0xfef2)
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#define PWM2_ARRL (*(unsigned char volatile __XDATA *)0xfef3)
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#define PWM2_RCR (*(unsigned char volatile __XDATA *)0xfef4)
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2021-12-29 18:05:13 +01:00
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#define PWM2_CCR1H (*(unsigned char volatile __XDATA *)0xfef5)
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#define PWM2_CCR1L (*(unsigned char volatile __XDATA *)0xfef6)
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#define PWM2_CCR2H (*(unsigned char volatile __XDATA *)0xfef7)
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#define PWM2_CCR2L (*(unsigned char volatile __XDATA *)0xfef8)
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#define PWM2_CCR3H (*(unsigned char volatile __XDATA *)0xfef9)
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#define PWM2_CCR3L (*(unsigned char volatile __XDATA *)0xfefa)
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#define PWM2_CCR4H (*(unsigned char volatile __XDATA *)0xfefb)
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#define PWM2_CCR4L (*(unsigned char volatile __XDATA *)0xfefc)
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#define PWM2_BKR (*(unsigned char volatile __XDATA *)0xfefd)
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#define PWM2_DTR (*(unsigned char volatile __XDATA *)0xfefe)
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#define PWM2_OISR (*(unsigned char volatile __XDATA *)0xfeff)
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2022-07-30 05:47:48 +02:00
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#if defined __CX51__
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#define PWM1_CNTR (*(unsigned int volatile __XDATA *)0xfece)
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#define PWM1_PSCR (*(unsigned int volatile __XDATA *)0xfed0)
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#define PWM1_ARR (*(unsigned int volatile __XDATA *)0xfed2)
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#define PWM1_CCR1 (*(unsigned int volatile __XDATA *)0xfed5)
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#define PWM1_CCR2 (*(unsigned int volatile __XDATA *)0xfed7)
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#define PWM1_CCR3 (*(unsigned int volatile __XDATA *)0xfed9)
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#define PWM1_CCR4 (*(unsigned int volatile __XDATA *)0xfedb)
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#define PWM2_CNTR (*(unsigned int volatile __XDATA *)0xfeee)
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#define PWM2_PSCR (*(unsigned int volatile __XDATA *)0xfef0)
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#define PWM2_ARR (*(unsigned int volatile __XDATA *)0xfef2)
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#define PWM2_CCR1 (*(unsigned int volatile __XDATA *)0xfef5)
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#define PWM2_CCR2 (*(unsigned int volatile __XDATA *)0xfef7)
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#define PWM2_CCR3 (*(unsigned int volatile __XDATA *)0xfef9)
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#define PWM2_CCR4 (*(unsigned int volatile __XDATA *)0xfefb)
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#endif
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2021-12-31 13:02:01 +01:00
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*/
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2021-12-29 18:05:13 +01:00
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#define PWMA_ETRPS (*(unsigned char volatile __XDATA *)0xfeb0)
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#define PWMA_ENO (*(unsigned char volatile __XDATA *)0xfeb1)
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#define PWMA_PS (*(unsigned char volatile __XDATA *)0xfeb2)
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#define PWMA_IOAUX (*(unsigned char volatile __XDATA *)0xfeb3)
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#define PWMB_ETRPS (*(unsigned char volatile __XDATA *)0xfeb4)
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#define PWMB_ENO (*(unsigned char volatile __XDATA *)0xfeb5)
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#define PWMB_PS (*(unsigned char volatile __XDATA *)0xfeb6)
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#define PWMB_IOAUX (*(unsigned char volatile __XDATA *)0xfeb7)
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#define PWMA_CR1 (*(unsigned char volatile __XDATA *)0xfec0)
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#define PWMA_CR2 (*(unsigned char volatile __XDATA *)0xfec1)
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#define PWMA_SMCR (*(unsigned char volatile __XDATA *)0xfec2)
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#define PWMA_ETR (*(unsigned char volatile __XDATA *)0xfec3)
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#define PWMA_IER (*(unsigned char volatile __XDATA *)0xfec4)
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#define PWMA_SR1 (*(unsigned char volatile __XDATA *)0xfec5)
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#define PWMA_SR2 (*(unsigned char volatile __XDATA *)0xfec6)
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#define PWMA_EGR (*(unsigned char volatile __XDATA *)0xfec7)
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2021-12-31 13:02:01 +01:00
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#define PWMA_CCMRx 0xfec8
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2021-12-29 18:05:13 +01:00
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#define PWMA_CCMR1 (*(unsigned char volatile __XDATA *)0xfec8)
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#define PWMA_CCMR2 (*(unsigned char volatile __XDATA *)0xfec9)
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#define PWMA_CCMR3 (*(unsigned char volatile __XDATA *)0xfeca)
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#define PWMA_CCMR4 (*(unsigned char volatile __XDATA *)0xfecb)
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#define PWMA_CCER1 (*(unsigned char volatile __XDATA *)0xfecc)
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#define PWMA_CCER2 (*(unsigned char volatile __XDATA *)0xfecd)
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2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMA_CNTRH (*(unsigned char volatile __XDATA *)0xfece)
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#define PWMA_CNTRL (*(unsigned char volatile __XDATA *)0xfecf)
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2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMA_PSCRH (*(unsigned char volatile __XDATA *)0xfed0)
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#define PWMA_PSCRL (*(unsigned char volatile __XDATA *)0xfed1)
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2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMA_ARRH (*(unsigned char volatile __XDATA *)0xfed2)
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#define PWMA_ARRL (*(unsigned char volatile __XDATA *)0xfed3)
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#define PWMA_RCR (*(unsigned char volatile __XDATA *)0xfed4)
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2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMA_CCR1H (*(unsigned char volatile __XDATA *)0xfed5)
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#define PWMA_CCR1L (*(unsigned char volatile __XDATA *)0xfed6)
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2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMA_CCR2H (*(unsigned char volatile __XDATA *)0xfed7)
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#define PWMA_CCR2L (*(unsigned char volatile __XDATA *)0xfed8)
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2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMA_CCR3H (*(unsigned char volatile __XDATA *)0xfed9)
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#define PWMA_CCR3L (*(unsigned char volatile __XDATA *)0xfeda)
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2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMA_CCR4H (*(unsigned char volatile __XDATA *)0xfedb)
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#define PWMA_CCR4L (*(unsigned char volatile __XDATA *)0xfedc)
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#define PWMA_BKR (*(unsigned char volatile __XDATA *)0xfedd)
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#define PWMA_DTR (*(unsigned char volatile __XDATA *)0xfede)
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#define PWMA_OISR (*(unsigned char volatile __XDATA *)0xfedf)
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#define PWMB_CR1 (*(unsigned char volatile __XDATA *)0xfee0)
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#define PWMB_CR2 (*(unsigned char volatile __XDATA *)0xfee1)
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#define PWMB_SMCR (*(unsigned char volatile __XDATA *)0xfee2)
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#define PWMB_ETR (*(unsigned char volatile __XDATA *)0xfee3)
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#define PWMB_IER (*(unsigned char volatile __XDATA *)0xfee4)
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#define PWMB_SR1 (*(unsigned char volatile __XDATA *)0xfee5)
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#define PWMB_SR2 (*(unsigned char volatile __XDATA *)0xfee6)
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#define PWMB_EGR (*(unsigned char volatile __XDATA *)0xfee7)
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2021-12-31 13:02:01 +01:00
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#define PWMB_CCMRx 0xfee8
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2021-12-29 18:05:13 +01:00
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#define PWMB_CCMR1 (*(unsigned char volatile __XDATA *)0xfee8)
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#define PWMB_CCMR2 (*(unsigned char volatile __XDATA *)0xfee9)
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#define PWMB_CCMR3 (*(unsigned char volatile __XDATA *)0xfeea)
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#define PWMB_CCMR4 (*(unsigned char volatile __XDATA *)0xfeeb)
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#define PWMB_CCER1 (*(unsigned char volatile __XDATA *)0xfeec)
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#define PWMB_CCER2 (*(unsigned char volatile __XDATA *)0xfeed)
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2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMB_CNTRH (*(unsigned char volatile __XDATA *)0xfeee)
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#define PWMB_CNTRL (*(unsigned char volatile __XDATA *)0xfeef)
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2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMB_PSCRH (*(unsigned char volatile __XDATA *)0xfef0)
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#define PWMB_PSCRL (*(unsigned char volatile __XDATA *)0xfef1)
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2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMB_ARRH (*(unsigned char volatile __XDATA *)0xfef2)
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#define PWMB_ARRL (*(unsigned char volatile __XDATA *)0xfef3)
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#define PWMB_RCR (*(unsigned char volatile __XDATA *)0xfef4)
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2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMB_CCR5H (*(unsigned char volatile __XDATA *)0xfef5)
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#define PWMB_CCR5L (*(unsigned char volatile __XDATA *)0xfef6)
|
2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMB_CCR6H (*(unsigned char volatile __XDATA *)0xfef7)
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#define PWMB_CCR6L (*(unsigned char volatile __XDATA *)0xfef8)
|
2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMB_CCR7H (*(unsigned char volatile __XDATA *)0xfef9)
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#define PWMB_CCR7L (*(unsigned char volatile __XDATA *)0xfefa)
|
2022-07-30 05:47:48 +02:00
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2021-12-29 18:05:13 +01:00
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#define PWMB_CCR8H (*(unsigned char volatile __XDATA *)0xfefb)
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#define PWMB_CCR8L (*(unsigned char volatile __XDATA *)0xfefc)
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#define PWMB_BKR (*(unsigned char volatile __XDATA *)0xfefd)
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#define PWMB_DTR (*(unsigned char volatile __XDATA *)0xfefe)
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#define PWMB_OISR (*(unsigned char volatile __XDATA *)0xfeff)
|
2021-12-31 13:02:01 +01:00
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|
2021-12-29 18:05:13 +01:00
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/////////////////////////////////////////////////
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|
//FD00H-FDFFH
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|
/////////////////////////////////////////////////
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#define PxINTE 0xfd00
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#define P0INTE (*(unsigned char volatile __XDATA *)0xfd00)
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#define P1INTE (*(unsigned char volatile __XDATA *)0xfd01)
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#define P2INTE (*(unsigned char volatile __XDATA *)0xfd02)
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#define P3INTE (*(unsigned char volatile __XDATA *)0xfd03)
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#define P4INTE (*(unsigned char volatile __XDATA *)0xfd04)
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#define P5INTE (*(unsigned char volatile __XDATA *)0xfd05)
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#define P6INTE (*(unsigned char volatile __XDATA *)0xfd06)
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#define P7INTE (*(unsigned char volatile __XDATA *)0xfd07)
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#define P0INTF (*(unsigned char volatile __XDATA *)0xfd10)
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#define P1INTF (*(unsigned char volatile __XDATA *)0xfd11)
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#define P2INTF (*(unsigned char volatile __XDATA *)0xfd12)
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#define P3INTF (*(unsigned char volatile __XDATA *)0xfd13)
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#define P4INTF (*(unsigned char volatile __XDATA *)0xfd14)
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#define P5INTF (*(unsigned char volatile __XDATA *)0xfd15)
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#define P6INTF (*(unsigned char volatile __XDATA *)0xfd16)
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#define P7INTF (*(unsigned char volatile __XDATA *)0xfd17)
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#define PxIM0 0xfd20
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#define P0IM0 (*(unsigned char volatile __XDATA *)0xfd20)
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#define P1IM0 (*(unsigned char volatile __XDATA *)0xfd21)
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#define P2IM0 (*(unsigned char volatile __XDATA *)0xfd22)
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#define P3IM0 (*(unsigned char volatile __XDATA *)0xfd23)
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#define P4IM0 (*(unsigned char volatile __XDATA *)0xfd24)
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#define P5IM0 (*(unsigned char volatile __XDATA *)0xfd25)
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#define P6IM0 (*(unsigned char volatile __XDATA *)0xfd26)
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#define P7IM0 (*(unsigned char volatile __XDATA *)0xfd27)
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#define PxIM1 0xfd30
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#define P0IM1 (*(unsigned char volatile __XDATA *)0xfd30)
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#define P1IM1 (*(unsigned char volatile __XDATA *)0xfd31)
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#define P2IM1 (*(unsigned char volatile __XDATA *)0xfd32)
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#define P3IM1 (*(unsigned char volatile __XDATA *)0xfd33)
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|
#define P4IM1 (*(unsigned char volatile __XDATA *)0xfd34)
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|
#define P5IM1 (*(unsigned char volatile __XDATA *)0xfd35)
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|
#define P6IM1 (*(unsigned char volatile __XDATA *)0xfd36)
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|
#define P7IM1 (*(unsigned char volatile __XDATA *)0xfd37)
|
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|
#define P0WKUE (*(unsigned char volatile __XDATA *)0xfd40)
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|
#define P1WKUE (*(unsigned char volatile __XDATA *)0xfd41)
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|
#define P2WKUE (*(unsigned char volatile __XDATA *)0xfd42)
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|
#define P3WKUE (*(unsigned char volatile __XDATA *)0xfd43)
|
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|
|
#define P4WKUE (*(unsigned char volatile __XDATA *)0xfd44)
|
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|
|
#define P5WKUE (*(unsigned char volatile __XDATA *)0xfd45)
|
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|
|
#define P6WKUE (*(unsigned char volatile __XDATA *)0xfd46)
|
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|
|
#define P7WKUE (*(unsigned char volatile __XDATA *)0xfd47)
|
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|
|
#define PIN_IP (*(unsigned char volatile __XDATA *)0xfd60)
|
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|
|
#define PIN_IPH (*(unsigned char volatile __XDATA *)0xfd61)
|
2022-01-01 08:12:42 +01:00
|
|
|
#define CHIPIDxx 0xfde0
|
|
|
|
#define CHIPID00 (*(unsigned char volatile __XDATA *)0xfde0)
|
2021-12-29 18:05:13 +01:00
|
|
|
|
|
|
|
/////////////////////////////////////////////////
|
|
|
|
//FC00H-FCFFH
|
|
|
|
/////////////////////////////////////////////////
|
|
|
|
|
|
|
|
#define MD3 (*(unsigned char volatile __XDATA *)0xfcf0)
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|
#define MD2 (*(unsigned char volatile __XDATA *)0xfcf1)
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|
#define MD1 (*(unsigned char volatile __XDATA *)0xfcf2)
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|
#define MD0 (*(unsigned char volatile __XDATA *)0xfcf3)
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|
#define MD5 (*(unsigned char volatile __XDATA *)0xfcf4)
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|
#define MD4 (*(unsigned char volatile __XDATA *)0xfcf5)
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|
|
#define ARCON (*(unsigned char volatile __XDATA *)0xfcf6)
|
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|
|
#define OPCON (*(unsigned char volatile __XDATA *)0xfcf7)
|
|
|
|
|
|
|
|
/////////////////////////////////////////////////
|
|
|
|
//FB00H-FBFFH
|
|
|
|
/////////////////////////////////////////////////
|
|
|
|
|
|
|
|
#define COMEN (*(unsigned char volatile __XDATA *)0xfb00)
|
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|
|
#define SEGENL (*(unsigned char volatile __XDATA *)0xfb01)
|
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|
#define SEGENH (*(unsigned char volatile __XDATA *)0xfb02)
|
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|
|
#define LEDCTRL (*(unsigned char volatile __XDATA *)0xfb03)
|
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|
|
#define LEDCKS (*(unsigned char volatile __XDATA *)0xfb04)
|
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|
|
#define COM0_DA_L (*(unsigned char volatile __XDATA *)0xfb10)
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|
#define COM1_DA_L (*(unsigned char volatile __XDATA *)0xfb11)
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|
#define COM2_DA_L (*(unsigned char volatile __XDATA *)0xfb12)
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|
#define COM3_DA_L (*(unsigned char volatile __XDATA *)0xfb13)
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|
#define COM4_DA_L (*(unsigned char volatile __XDATA *)0xfb14)
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|
#define COM5_DA_L (*(unsigned char volatile __XDATA *)0xfb15)
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|
#define COM6_DA_L (*(unsigned char volatile __XDATA *)0xfb16)
|
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|
#define COM7_DA_L (*(unsigned char volatile __XDATA *)0xfb17)
|
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|
|
#define COM0_DA_H (*(unsigned char volatile __XDATA *)0xfb18)
|
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|
#define COM1_DA_H (*(unsigned char volatile __XDATA *)0xfb19)
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|
#define COM2_DA_H (*(unsigned char volatile __XDATA *)0xfb1a)
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|
#define COM3_DA_H (*(unsigned char volatile __XDATA *)0xfb1b)
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|
#define COM4_DA_H (*(unsigned char volatile __XDATA *)0xfb1c)
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|
#define COM5_DA_H (*(unsigned char volatile __XDATA *)0xfb1d)
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|
#define COM6_DA_H (*(unsigned char volatile __XDATA *)0xfb1e)
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|
#define COM7_DA_H (*(unsigned char volatile __XDATA *)0xfb1f)
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|
#define COM0_DC_L (*(unsigned char volatile __XDATA *)0xfb20)
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|
#define COM1_DC_L (*(unsigned char volatile __XDATA *)0xfb21)
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|
#define COM2_DC_L (*(unsigned char volatile __XDATA *)0xfb22)
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|
#define COM3_DC_L (*(unsigned char volatile __XDATA *)0xfb23)
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|
#define COM4_DC_L (*(unsigned char volatile __XDATA *)0xfb24)
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|
#define COM5_DC_L (*(unsigned char volatile __XDATA *)0xfb25)
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|
#define COM6_DC_L (*(unsigned char volatile __XDATA *)0xfb26)
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|
|
#define COM7_DC_L (*(unsigned char volatile __XDATA *)0xfb27)
|
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|
|
#define COM0_DC_H (*(unsigned char volatile __XDATA *)0xfb28)
|
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|
#define COM1_DC_H (*(unsigned char volatile __XDATA *)0xfb29)
|
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|
|
#define COM2_DC_H (*(unsigned char volatile __XDATA *)0xfb2a)
|
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|
|
#define COM3_DC_H (*(unsigned char volatile __XDATA *)0xfb2b)
|
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|
|
#define COM4_DC_H (*(unsigned char volatile __XDATA *)0xfb2c)
|
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|
|
#define COM5_DC_H (*(unsigned char volatile __XDATA *)0xfb2d)
|
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|
|
#define COM6_DC_H (*(unsigned char volatile __XDATA *)0xfb2e)
|
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|
#define COM7_DC_H (*(unsigned char volatile __XDATA *)0xfb2f)
|
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|
|
#define TSCHEN1 (*(unsigned char volatile __XDATA *)0xfb40)
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|
#define TSCHEN2 (*(unsigned char volatile __XDATA *)0xfb41)
|
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|
|
#define TSCFG1 (*(unsigned char volatile __XDATA *)0xfb42)
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|
|
#define TSCFG2 (*(unsigned char volatile __XDATA *)0xfb43)
|
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|
|
#define TSWUTC (*(unsigned char volatile __XDATA *)0xfb44)
|
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|
|
#define TSCTRL (*(unsigned char volatile __XDATA *)0xfb45)
|
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|
|
#define TSSTA1 (*(unsigned char volatile __XDATA *)0xfb46)
|
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|
|
#define TSSTA2 (*(unsigned char volatile __XDATA *)0xfb47)
|
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|
|
#define TSRT (*(unsigned char volatile __XDATA *)0xfb48)
|
2022-07-30 05:47:48 +02:00
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|
2021-12-29 18:05:13 +01:00
|
|
|
#define TSDATH (*(unsigned char volatile __XDATA *)0xfb49)
|
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|
|
#define TSDATL (*(unsigned char volatile __XDATA *)0xfb4A)
|
2022-07-30 05:47:48 +02:00
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|
2021-12-29 18:05:13 +01:00
|
|
|
#define TSTH00H (*(unsigned char volatile __XDATA *)0xfb50)
|
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|
|
#define TSTH00L (*(unsigned char volatile __XDATA *)0xfb51)
|
2022-07-30 05:47:48 +02:00
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|
2021-12-29 18:05:13 +01:00
|
|
|
#define TSTH01H (*(unsigned char volatile __XDATA *)0xfb52)
|
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|
|
#define TSTH01L (*(unsigned char volatile __XDATA *)0xfb53)
|
2022-07-30 05:47:48 +02:00
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|
2021-12-29 18:05:13 +01:00
|
|
|
#define TSTH02H (*(unsigned char volatile __XDATA *)0xfb54)
|
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|
|
#define TSTH02L (*(unsigned char volatile __XDATA *)0xfb55)
|
2022-07-30 05:47:48 +02:00
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|
2021-12-29 18:05:13 +01:00
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|
|
#define TSTH03H (*(unsigned char volatile __XDATA *)0xfb56)
|
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|
|
#define TSTH03L (*(unsigned char volatile __XDATA *)0xfb57)
|
2022-07-30 05:47:48 +02:00
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|
2021-12-29 18:05:13 +01:00
|
|
|
#define TSTH04H (*(unsigned char volatile __XDATA *)0xfb58)
|
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|
|
#define TSTH04L (*(unsigned char volatile __XDATA *)0xfb59)
|
2022-07-30 05:47:48 +02:00
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|
2021-12-29 18:05:13 +01:00
|
|
|
#define TSTH05H (*(unsigned char volatile __XDATA *)0xfb5a)
|
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|
|
#define TSTH05L (*(unsigned char volatile __XDATA *)0xfb5b)
|
2022-07-30 05:47:48 +02:00
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|
2021-12-29 18:05:13 +01:00
|
|
|
#define TSTH06H (*(unsigned char volatile __XDATA *)0xfb5c)
|
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|
|
#define TSTH06L (*(unsigned char volatile __XDATA *)0xfb5d)
|
2022-07-30 05:47:48 +02:00
|
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|
2021-12-29 18:05:13 +01:00
|
|
|
#define TSTH07H (*(unsigned char volatile __XDATA *)0xfb5e)
|
|
|
|
#define TSTH07L (*(unsigned char volatile __XDATA *)0xfb5f)
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#define TSTH08H (*(unsigned char volatile __XDATA *)0xfb60)
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#define TSTH08L (*(unsigned char volatile __XDATA *)0xfb61)
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#define TSTH09H (*(unsigned char volatile __XDATA *)0xfb62)
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#define TSTH09L (*(unsigned char volatile __XDATA *)0xfb63)
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#define TSTH10H (*(unsigned char volatile __XDATA *)0xfb64)
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#define TSTH10L (*(unsigned char volatile __XDATA *)0xfb65)
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#define TSTH11H (*(unsigned char volatile __XDATA *)0xfb66)
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#define TSTH11L (*(unsigned char volatile __XDATA *)0xfb67)
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#define TSTH12H (*(unsigned char volatile __XDATA *)0xfb68)
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#define TSTH12L (*(unsigned char volatile __XDATA *)0xfb69)
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#define TSTH13H (*(unsigned char volatile __XDATA *)0xfb6a)
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#define TSTH13L (*(unsigned char volatile __XDATA *)0xfb6b)
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#define TSTH14H (*(unsigned char volatile __XDATA *)0xfb6c)
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#define TSTH14L (*(unsigned char volatile __XDATA *)0xfb6d)
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#define TSTH15H (*(unsigned char volatile __XDATA *)0xfb6e)
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#define TSTH15L (*(unsigned char volatile __XDATA *)0xfb6f)
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/////////////////////////////////////////////////
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//FA00H-FAFFH
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/////////////////////////////////////////////////
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2022-01-10 13:19:12 +01:00
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#define DMA_M2M_CFG (*(unsigned char volatile __XDATA *)0xfa00)
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#define DMA_M2M_CR (*(unsigned char volatile __XDATA *)0xfa01)
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#define DMA_M2M_STA (*(unsigned char volatile __XDATA *)0xfa02)
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#define DMA_M2M_AMT (*(unsigned char volatile __XDATA *)0xfa03)
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#define DMA_M2M_DONE (*(unsigned char volatile __XDATA *)0xfa04)
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#define DMA_M2M_TXAH (*(unsigned char volatile __XDATA *)0xfa05)
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#define DMA_M2M_TXAL (*(unsigned char volatile __XDATA *)0xfa06)
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#define DMA_M2M_RXAH (*(unsigned char volatile __XDATA *)0xfa07)
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#define DMA_M2M_RXAL (*(unsigned char volatile __XDATA *)0xfa08)
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#define DMA_ADC_CFG (*(unsigned char volatile __XDATA *)0xfa10)
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#define DMA_ADC_CR (*(unsigned char volatile __XDATA *)0xfa11)
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#define DMA_ADC_STA (*(unsigned char volatile __XDATA *)0xfa12)
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#define DMA_ADC_RXAH (*(unsigned char volatile __XDATA *)0xfa17)
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#define DMA_ADC_RXAL (*(unsigned char volatile __XDATA *)0xfa18)
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#define DMA_ADC_CFG2 (*(unsigned char volatile __XDATA *)0xfa19)
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#define DMA_ADC_CHSW0 (*(unsigned char volatile __XDATA *)0xfa1a)
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#define DMA_ADC_CHSW1 (*(unsigned char volatile __XDATA *)0xfa1b)
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#define DMA_SPI_CFG (*(unsigned char volatile __XDATA *)0xfa20)
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#define DMA_SPI_CR (*(unsigned char volatile __XDATA *)0xfa21)
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#define DMA_SPI_STA (*(unsigned char volatile __XDATA *)0xfa22)
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#define DMA_SPI_AMT (*(unsigned char volatile __XDATA *)0xfa23)
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#define DMA_SPI_DONE (*(unsigned char volatile __XDATA *)0xfa24)
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#define DMA_SPI_TXAH (*(unsigned char volatile __XDATA *)0xfa25)
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#define DMA_SPI_TXAL (*(unsigned char volatile __XDATA *)0xfa26)
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#define DMA_SPI_RXAH (*(unsigned char volatile __XDATA *)0xfa27)
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#define DMA_SPI_RXAL (*(unsigned char volatile __XDATA *)0xfa28)
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#define DMA_SPI_CFG2 (*(unsigned char volatile __XDATA *)0xfa29)
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#define DMA_UR1T_CFG (*(unsigned char volatile __XDATA *)0xfa30)
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#define DMA_UR1T_CR (*(unsigned char volatile __XDATA *)0xfa31)
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#define DMA_UR1T_STA (*(unsigned char volatile __XDATA *)0xfa32)
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#define DMA_UR1T_AMT (*(unsigned char volatile __XDATA *)0xfa33)
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#define DMA_UR1T_DONE (*(unsigned char volatile __XDATA *)0xfa34)
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#define DMA_UR1T_TXAH (*(unsigned char volatile __XDATA *)0xfa35)
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#define DMA_UR1T_TXAL (*(unsigned char volatile __XDATA *)0xfa36)
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#define DMA_UR1R_CFG (*(unsigned char volatile __XDATA *)0xfa38)
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#define DMA_UR1R_CR (*(unsigned char volatile __XDATA *)0xfa39)
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#define DMA_UR1R_STA (*(unsigned char volatile __XDATA *)0xfa3a)
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#define DMA_UR1R_AMT (*(unsigned char volatile __XDATA *)0xfa3b)
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#define DMA_UR1R_DONE (*(unsigned char volatile __XDATA *)0xfa3c)
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#define DMA_UR1R_RXAH (*(unsigned char volatile __XDATA *)0xfa3d)
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#define DMA_UR1R_RXAL (*(unsigned char volatile __XDATA *)0xfa3e)
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#define DMA_UR2T_CFG (*(unsigned char volatile __XDATA *)0xfa40)
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#define DMA_UR2T_CR (*(unsigned char volatile __XDATA *)0xfa41)
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#define DMA_UR2T_STA (*(unsigned char volatile __XDATA *)0xfa42)
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#define DMA_UR2T_AMT (*(unsigned char volatile __XDATA *)0xfa43)
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#define DMA_UR2T_DONE (*(unsigned char volatile __XDATA *)0xfa44)
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#define DMA_UR2T_TXAH (*(unsigned char volatile __XDATA *)0xfa45)
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#define DMA_UR2T_TXAL (*(unsigned char volatile __XDATA *)0xfa46)
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#define DMA_UR2R_CFG (*(unsigned char volatile __XDATA *)0xfa48)
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#define DMA_UR2R_CR (*(unsigned char volatile __XDATA *)0xfa49)
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#define DMA_UR2R_STA (*(unsigned char volatile __XDATA *)0xfa4a)
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#define DMA_UR2R_AMT (*(unsigned char volatile __XDATA *)0xfa4b)
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#define DMA_UR2R_DONE (*(unsigned char volatile __XDATA *)0xfa4c)
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#define DMA_UR2R_RXAH (*(unsigned char volatile __XDATA *)0xfa4d)
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#define DMA_UR2R_RXAL (*(unsigned char volatile __XDATA *)0xfa4e)
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#define DMA_UR3T_CFG (*(unsigned char volatile __XDATA *)0xfa50)
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#define DMA_UR3T_CR (*(unsigned char volatile __XDATA *)0xfa51)
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#define DMA_UR3T_STA (*(unsigned char volatile __XDATA *)0xfa52)
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#define DMA_UR3T_AMT (*(unsigned char volatile __XDATA *)0xfa53)
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#define DMA_UR3T_DONE (*(unsigned char volatile __XDATA *)0xfa54)
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#define DMA_UR3T_TXAH (*(unsigned char volatile __XDATA *)0xfa55)
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#define DMA_UR3T_TXAL (*(unsigned char volatile __XDATA *)0xfa56)
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#define DMA_UR3R_CFG (*(unsigned char volatile __XDATA *)0xfa58)
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#define DMA_UR3R_CR (*(unsigned char volatile __XDATA *)0xfa59)
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#define DMA_UR3R_STA (*(unsigned char volatile __XDATA *)0xfa5a)
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#define DMA_UR3R_AMT (*(unsigned char volatile __XDATA *)0xfa5b)
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#define DMA_UR3R_DONE (*(unsigned char volatile __XDATA *)0xfa5c)
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#define DMA_UR3R_RXAH (*(unsigned char volatile __XDATA *)0xfa5d)
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#define DMA_UR3R_RXAL (*(unsigned char volatile __XDATA *)0xfa5e)
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#define DMA_UR4T_CFG (*(unsigned char volatile __XDATA *)0xfa60)
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#define DMA_UR4T_CR (*(unsigned char volatile __XDATA *)0xfa61)
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#define DMA_UR4T_STA (*(unsigned char volatile __XDATA *)0xfa62)
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#define DMA_UR4T_AMT (*(unsigned char volatile __XDATA *)0xfa63)
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#define DMA_UR4T_DONE (*(unsigned char volatile __XDATA *)0xfa64)
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#define DMA_UR4T_TXAH (*(unsigned char volatile __XDATA *)0xfa65)
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#define DMA_UR4T_TXAL (*(unsigned char volatile __XDATA *)0xfa66)
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#define DMA_UR4R_CFG (*(unsigned char volatile __XDATA *)0xfa68)
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#define DMA_UR4R_CR (*(unsigned char volatile __XDATA *)0xfa69)
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#define DMA_UR4R_STA (*(unsigned char volatile __XDATA *)0xfa6a)
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#define DMA_UR4R_AMT (*(unsigned char volatile __XDATA *)0xfa6b)
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#define DMA_UR4R_DONE (*(unsigned char volatile __XDATA *)0xfa6c)
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#define DMA_UR4R_RXAH (*(unsigned char volatile __XDATA *)0xfa6d)
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#define DMA_UR4R_RXAL (*(unsigned char volatile __XDATA *)0xfa6e)
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#define DMA_LCM_CFG (*(unsigned char volatile __XDATA *)0xfa70)
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#define DMA_LCM_CR (*(unsigned char volatile __XDATA *)0xfa71)
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#define DMA_LCM_STA (*(unsigned char volatile __XDATA *)0xfa72)
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#define DMA_LCM_AMT (*(unsigned char volatile __XDATA *)0xfa73)
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#define DMA_LCM_DONE (*(unsigned char volatile __XDATA *)0xfa74)
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#define DMA_LCM_TXAH (*(unsigned char volatile __XDATA *)0xfa75)
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#define DMA_LCM_TXAL (*(unsigned char volatile __XDATA *)0xfa76)
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#define DMA_LCM_RXAH (*(unsigned char volatile __XDATA *)0xfa77)
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#define DMA_LCM_RXAL (*(unsigned char volatile __XDATA *)0xfa78)
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2021-12-29 18:05:13 +01:00
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#if defined __CX51__
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#define PWMA_CNTR (*(unsigned int volatile __XDATA *)0xfece)
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#define PWMA_PSCR (*(unsigned int volatile __XDATA *)0xfed0)
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#define PWMA_ARR (*(unsigned int volatile __XDATA *)0xfed2)
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#define PWMA_CCR1 (*(unsigned int volatile __XDATA *)0xfed5)
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#define PWMA_CCR2 (*(unsigned int volatile __XDATA *)0xfed7)
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#define PWMA_CCR3 (*(unsigned int volatile __XDATA *)0xfed9)
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#define PWMA_CCR4 (*(unsigned int volatile __XDATA *)0xfedb)
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#define PWMB_CNTR (*(unsigned int volatile __XDATA *)0xfeee)
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#define PWMB_PSCR (*(unsigned int volatile __XDATA *)0xfef0)
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#define PWMB_ARR (*(unsigned int volatile __XDATA *)0xfef2)
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#define PWMB_CCR5 (*(unsigned int volatile __XDATA *)0xfef5)
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#define PWMB_CCR6 (*(unsigned int volatile __XDATA *)0xfef7)
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#define PWMB_CCR7 (*(unsigned int volatile __XDATA *)0xfef9)
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#define PWMB_CCR8 (*(unsigned int volatile __XDATA *)0xfefb)
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#define TSDAT (*(unsigned int volatile __XDATA *)0xfb49)
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#define TSTH00 (*(unsigned int volatile __XDATA *)0xfb50)
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#define TSTH01 (*(unsigned int volatile __XDATA *)0xfb52)
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#define TSTH02 (*(unsigned int volatile __XDATA *)0xfb54)
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#define TSTH03 (*(unsigned int volatile __XDATA *)0xfb56)
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#define TSTH04 (*(unsigned int volatile __XDATA *)0xfb58)
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#define TSTH05 (*(unsigned int volatile __XDATA *)0xfb5a)
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#define TSTH06 (*(unsigned int volatile __XDATA *)0xfb5c)
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#define TSTH07 (*(unsigned int volatile __XDATA *)0xfb5e)
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#define TSTH08 (*(unsigned int volatile __XDATA *)0xfb60)
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#define TSTH09 (*(unsigned int volatile __XDATA *)0xfb62)
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#define TSTH10 (*(unsigned int volatile __XDATA *)0xfb64)
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#define TSTH11 (*(unsigned int volatile __XDATA *)0xfb66)
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#define TSTH12 (*(unsigned int volatile __XDATA *)0xfb68)
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#define TSTH13 (*(unsigned int volatile __XDATA *)0xfb6a)
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#define TSTH14 (*(unsigned int volatile __XDATA *)0xfb6c)
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#define TSTH15 (*(unsigned int volatile __XDATA *)0xfb6e)
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#endif
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2021-12-29 18:05:13 +01:00
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/////////////////////////////////////////////////
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#endif
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