opt: update pwm method names
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cb9abdb1f8
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@ -25,7 +25,8 @@
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void main(void)
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{
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uint16_t dc = 0;
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__BIT dir = SET;
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uint8_t dc = 0;
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SYS_SetClock();
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// UART1, baud 115200, baud source Timer2, 1T mode
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@ -39,7 +40,7 @@ void main(void)
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// Set PWMA.1 port direction output
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PWMA_PWM1_SetPortDirection(PWMB_PortDirOut);
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// Set PWMA.1 output low voltage when counter is less than target value
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PWMA_PWM1_SetOutputMode(PWM_OutputMode_PWM_LowIfLess);
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PWMA_PWM1_ConfigOutputMode(PWM_OutputMode_PWM_LowIfLess);
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// Enable comparison value preload to make duty cycle changing smooth
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PWMA_PWM1_SetComparePreload(HAL_State_ON);
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// Turn on PWMA.1
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@ -48,12 +49,12 @@ void main(void)
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PWMA_PWM1N_SetPortState(HAL_State_ON);
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// Set highest PWM clock
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PWMA_SetPrescaler(0);
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// PWM width = AutoReloadPeriod + 1 (side alignment), or AutoReloadPeriod * 2 (center alignment)
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PWMA_SetAutoReloadPeriod(0xFF);
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// PWM width = Period + 1 (side alignment), or AutoReloadPeriod * 2 (center alignment)
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PWMA_SetPeriod(0xFF);
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// Counter direction, down:from [PWMA_ARRH,PWMA_ARRL] to 0
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PWMA_SetCounterDirection(PWM_CounterDirection_Down);
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// Enable preload on reload-period
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PWMA_SetAutoReloadPeriodPreload(HAL_State_ON);
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PWMA_SetAutoReloadPreload(HAL_State_ON);
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// Enable output on PWMA.1P, PWMA.1N
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PWMA_SetPinOutputState(PWM_Pin_1|PWM_Pin_1N, HAL_State_ON);
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// Set PWMA.1 alternative ports to P1.0 and P1.1
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@ -66,11 +67,18 @@ void main(void)
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while(1)
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{
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PWMA_PWM1_SetCaptureCompareValue(dc);
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UART1_TxHex(dc >> 8);
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UART1_TxHex(dc & 0xFF);
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dc++;
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UART1_TxHex(0xFF);
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if (dir)
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{
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dc++;
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if (dc == 0xFF) dir = !dir;
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}
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else
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{
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dc--;
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if (dc == 0) dir = !dir;
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}
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UART1_TxString("\r\n");
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if (dc == 0xFF) dc = 0;
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SYS_Delay(10);
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}
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}
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@ -84,14 +84,14 @@ typedef enum
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* central alignment:
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* Fpwm = SYSCLK / (PWMx_PSCR + 1) / PWMx_ARR / 2
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*/
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#define PWMA_SetPrescaler(__16BIT_VAL__) do{ \
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#define PWMA_SetPrescaler(__16BIT_VAL__) do { \
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P_SW2 = 0x80; \
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(PWMA_PSCRH = ((__16BIT_VAL__) >> 8)); \
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(PWMA_PSCRL = ((__16BIT_VAL__) & 0xFF)); \
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P_SW2 = 0x00; \
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}while(0)
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#define PWMA_SetAutoReloadPeriod(__16BIT_VAL__) do{ \
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#define PWMA_SetPeriod(__16BIT_VAL__) do { \
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P_SW2 = 0x80; \
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(PWMA_ARRH = ((__16BIT_VAL__) >> 8)); \
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(PWMA_ARRL = ((__16BIT_VAL__) & 0xFF)); \
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@ -107,24 +107,27 @@ typedef enum
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PWMA_ENO = PWMA_ENO & ~(__PINS__) | (((__STATE__) & 0x01)? (__PINS__) : 0x00); \
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P_SW2 = 0x00; \
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} while(0)
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// Enable/Disable PWMB_BKR Control on Pins
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#define PWMA_SetPinBrakeControl(__PINS__, __STATE__) do { \
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P_SW2 = 0x80; \
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PWMA_IOAUX = PWMA_IOAUX & ~(__PINS__) | (((__STATE__) & 0x01)? (__PINS__) : 0x00); \
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P_SW2 = 0x00; \
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} while(0)
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/**
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* 0: New period will be written to [PWMA_ARRH,PWMA_ARRL] and take effect immediately
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* 1: New period will be written to shadow register and loaded to [PWMA_ARRH,PWMA_ARRL] on next update event
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*/
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#define PWMA_SetAutoReloadPeriodPreload(__STATE__) SFRX_ASSIGN(PWMA_CR1, 7, (__STATE__))
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#define PWMA_SetAutoReloadPreload(__STATE__) SFRX_ASSIGN(PWMA_CR1, 7, (__STATE__))
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/**
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* Turn off counter (call PWMA_SetCounterState()) before changing to different alignment
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*/
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#define PWMA_SetEdgeAlignment(__ALIGN__) do{ \
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P_SW2 = 0x80;(PWMA_CR1 = PWMA_CR1 & ~(0x03 << 5) | ((__ALIGN__) << 5)); P_SW2 = 0x00; \
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P_SW2 = 0x80;(PWMA_CR1 = PWMA_CR1 & ~(0x03 << 5) | ((__ALIGN__) << 5));P_SW2 = 0x00; \
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}while(0)
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/**
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* 0: count from 0 to [PWMA_ARRH,PWMA_ARRL], then send an event and restart from 0
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* 1: count from [PWMA_ARRH,PWMA_ARRL] to 0, then send an event and restart from [PWMA_ARRH,PWMA_ARRL]
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@ -183,6 +186,7 @@ typedef enum
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PWMA_PortDirIn_TI2FP1_TI1FP2_TI4FP3_TI3FP4 = 0x10,
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PWMA_PortDirInTRC = 0x11,
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} PWMA_PortDirection_t;
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#define PWMA_PWM1_SetPortDirection(__PORT_DIR__) do{ \
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P_SW2 = 0x80;(PWMA_CCMR1 = PWMA_CCMR1 & ~(0x03 << 0) | ((__PORT_DIR__) << 0)); P_SW2 = 0x00; \
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}while(0)
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@ -209,16 +213,16 @@ typedef enum
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/**
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* Configurate PWMA.1 - PWMA.4 out mode
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*/
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#define PWMA_PWM1_SetOutputMode(__MODE__) do{ \
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#define PWMA_PWM1_ConfigOutputMode(__MODE__) do{ \
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P_SW2 = 0x80;(PWMA_CCMR1 = PWMA_CCMR1 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \
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}while(0)
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#define PWMA_PWM2_SetOutputMode(__MODE__) do{ \
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#define PWMA_PWM2_ConfigOutputMode(__MODE__) do{ \
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P_SW2 = 0x80;(PWMA_CCMR2 = PWMA_CCMR2 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \
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}while(0)
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#define PWMA_PWM3_SetOutputMode(__MODE__) do{ \
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#define PWMA_PWM3_ConfigOutputMode(__MODE__) do{ \
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P_SW2 = 0x80;(PWMA_CCMR3 = PWMA_CCMR3 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \
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}while(0)
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#define PWMA_PWM4_SetOutputMode(__MODE__) do{ \
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#define PWMA_PWM4_ConfigOutputMode(__MODE__) do{ \
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P_SW2 = 0x80;(PWMA_CCMR4 = PWMA_CCMR4 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \
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}while(0)
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@ -311,22 +315,30 @@ typedef enum
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* central alignment:
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* Fpwm = SYSCLK / (PWMx_PSCR + 1) / PWMx_ARR / 2
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*/
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#define PWMB_SetPrescaler(__16BIT_PRESCALER__) do { \
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#define PWMB_SetPrescaler(__16BIT_VAL__) do { \
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P_SW2 = 0x80; \
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(PWMB_PSCRH = ((__16BIT_PRESCALER__) >> 8)); \
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(PWMB_PSCRL = ((__16BIT_PRESCALER__) & 0xFF)); \
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(PWMB_PSCRH = ((__16BIT_VAL__) >> 8)); \
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(PWMB_PSCRL = ((__16BIT_VAL__) & 0xFF)); \
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P_SW2 = 0x00; \
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} while(0)
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}while(0)
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#define PWMB_SetPeriod(__16BIT_VAL__) do { \
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P_SW2 = 0x80; \
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(PWMB_ARRH = ((__16BIT_VAL__) >> 8)); \
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(PWMB_ARRL = ((__16BIT_VAL__) & 0xFF)); \
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P_SW2 = 0x00; \
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}while(0)
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// PWMA all pins input/output OFF/ON
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#define PWMB_SetOverallState(__STATE__) SFRX_ASSIGN(PWMB_BKR, 7, (__STATE__))
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// Enable/Disable PWMB Pins Output
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// PWMB Pins Output OFF/ON
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#define PWMB_SetPinOutputState(__PINS__, __STATE__) do { \
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P_SW2 = 0x80; \
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PWMB_ENO = PWMB_ENO & ~(__PINS__) | (((__STATE__) & 0x01)? (__PINS__) : 0x00); \
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P_SW2 = 0x00; \
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} while(0)
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// Enable/Disable PWMB_BKR Control on Pins
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#define PWMB_SetPinBrakeControl(__PINS__, __STATE__) do { \
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P_SW2 = 0x80; \
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@ -335,17 +347,21 @@ typedef enum
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} while(0)
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/**
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* 0:no preload, 1:enable auto preload
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* 0: New period will be written to [PWMB_ARRH,PWMB_ARRL] and take effect immediately
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* 1: New period will be written to shadow register and loaded to [PWMB_ARRH,PWMB_ARRL] on next update event
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*/
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#define PWMB_SetAutoPreloadState(__STATE__) SFRX_ASSIGN(PWMB_CR1, 7, (__STATE__))
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#define PWMB_SetAutoReloadPreload(__STATE__) SFRX_ASSIGN(PWMB_CR1, 7, (__STATE__))
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#define PWMB_SetEdgeAlignment(__ALIGN__) do{ \
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P_SW2 = 0x80; \
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(PWMB_CR1 = PWMB_CR1 & ~(0x03 << 5) | ((__ALIGN__) << 5)); \
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P_SW2 = 0x00; \
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}while(0)
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/**
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* 0: count upwards, 1: count downwards
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* Turn off counter (call PWMB_SetCounterState()) before changing to different alignment
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*/
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#define PWMB_SetEdgeAlignment(__ALIGN__) do{ \
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P_SW2 = 0x80;(PWMB_CR1 = PWMB_CR1 & ~(0x03 << 5) | ((__ALIGN__) << 5));P_SW2 = 0x00; \
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}while(0)
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/**
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* 0: count from 0 to [PWMB_ARRH,PWMB_ARRL], then send an event and restart from 0
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* 1: count from [PWMB_ARRH,PWMB_ARRL] to 0, then send an event and restart from [PWMB_ARRH,PWMB_ARRL]
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*/
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#define PWMB_SetCounterDirection(__DIR__) SFRX_ASSIGN(PWMB_CR1, 4, (__DIR__))
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/**
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@ -364,11 +380,10 @@ typedef enum
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*/
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#define PWMB_SetNonUpdateEvent(__STATE__) SFRX_ASSIGN(PWMB_CR1, 1, (__STATE__))
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/**
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* 0:disable counter, 1:enable counter
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* 0:stop counter, 1:start counter
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*/
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#define PWMB_SetCounterState(__STATE__) SFRX_ASSIGN(PWMB_CR1, 0, (__STATE__))
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/**
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* PWMB.1(PWM5) - PWMB.4(PWM8) io polar and on/off state
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*/
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@ -410,6 +425,8 @@ typedef enum
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/**
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* PWMB.1 - PWMB.4 comparison value preload OFF/ON
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* 0: New values will be written to PWMx_CCRx and take effect immediately
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* 1: New values will be written to shadow register and loaded to PWMx_CCRx on next update event
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*/
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#define PWMB_PWM1_SetComparePreload(__STATE__) SFRX_ASSIGN(PWMB_CCMR1, 3, (__STATE__))
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#define PWMB_PWM2_SetComparePreload(__STATE__) SFRX_ASSIGN(PWMB_CCMR2, 3, (__STATE__))
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@ -419,16 +436,16 @@ typedef enum
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/**
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* Configurate PWMB.1(PWM5) - PWMB.4(PWM8) output mode
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*/
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#define PWMB_PWM1_SetOutputMode(__MODE__) do{ \
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#define PWMB_PWM1_ConfigOutputMode(__MODE__) do{ \
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P_SW2 = 0x80;(PWMB_CCMR1 = PWMB_CCMR1 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \
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}while(0)
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#define PWMB_PWM2_SetOutputMode(__MODE__) do{ \
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#define PWMB_PWM2_ConfigOutputMode(__MODE__) do{ \
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P_SW2 = 0x80;(PWMB_CCMR2 = PWMB_CCMR2 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \
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}while(0)
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#define PWMB_PWM3_SetOutputMode(__MODE__) do{ \
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#define PWMB_PWM3_ConfigOutputMode(__MODE__) do{ \
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P_SW2 = 0x80;(PWMB_CCMR3 = PWMB_CCMR3 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \
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}while(0)
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#define PWMB_PWM4_SetOutputMode(__MODE__) do{ \
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#define PWMB_PWM4_ConfigOutputMode(__MODE__) do{ \
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P_SW2 = 0x80;(PWMB_CCMR4 = PWMB_CCMR4 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \
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}while(0)
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@ -17,6 +17,7 @@
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#if defined (SDCC) || defined (__SDCC)
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#define __BIT __bit
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#define __IDATA __idata
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#define __XDATA __xdata
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#define __CODE __code
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@ -30,6 +31,7 @@
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#define NOP() __asm NOP __endasm
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#elif defined __CX51__
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#define __BIT bit
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#define __IDATA idata
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#define __XDATA xdata
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#define __CODE code
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@ -47,13 +49,14 @@
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#include <stdbool.h>
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#include <lint.h>
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# warning unrecognized compiler
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# define __IDATA
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# define __XDATA
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# define __CODE
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# define SBIT(name, addr, bit) volatile bool name
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# define SFR(name, addr) volatile unsigned char name
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# define SFRX(addr) (*(unsigned char volatile *)(addr))
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# define SFR16X(addr) (*(unsigned char volatile *)(addr))
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#define __BIT bool
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#define __IDATA
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#define __XDATA
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#define __CODE
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#define SBIT(name, addr, bit) volatile bool name
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#define SFR(name, addr) volatile unsigned char name
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#define SFRX(addr) (*(unsigned char volatile *)(addr))
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#define SFR16X(addr) (*(unsigned char volatile *)(addr))
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#define INTERRUPT(name, vector) void name (void)
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#define INTERRUPT_USING(name, vector, regnum) void name (void)
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#define NOP()
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@ -18,7 +18,7 @@
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static const char hexTable[16] = { '0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F'};
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char wptr, rptr, UART1_RxBuffer[UART_RX_BUFF_SIZE];
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__bit busy;
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__BIT busy;
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/**************************************************************************** /
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