diff --git a/demo/pwm/pwm_2ch_complementary.c b/demo/pwm/pwm_2ch_complementary.c index 69d4065..55be96e 100644 --- a/demo/pwm/pwm_2ch_complementary.c +++ b/demo/pwm/pwm_2ch_complementary.c @@ -25,7 +25,8 @@ void main(void) { - uint16_t dc = 0; + __BIT dir = SET; + uint8_t dc = 0; SYS_SetClock(); // UART1, baud 115200, baud source Timer2, 1T mode @@ -39,7 +40,7 @@ void main(void) // Set PWMA.1 port direction output PWMA_PWM1_SetPortDirection(PWMB_PortDirOut); // Set PWMA.1 output low voltage when counter is less than target value - PWMA_PWM1_SetOutputMode(PWM_OutputMode_PWM_LowIfLess); + PWMA_PWM1_ConfigOutputMode(PWM_OutputMode_PWM_LowIfLess); // Enable comparison value preload to make duty cycle changing smooth PWMA_PWM1_SetComparePreload(HAL_State_ON); // Turn on PWMA.1 @@ -48,12 +49,12 @@ void main(void) PWMA_PWM1N_SetPortState(HAL_State_ON); // Set highest PWM clock PWMA_SetPrescaler(0); - // PWM width = AutoReloadPeriod + 1 (side alignment), or AutoReloadPeriod * 2 (center alignment) - PWMA_SetAutoReloadPeriod(0xFF); + // PWM width = Period + 1 (side alignment), or AutoReloadPeriod * 2 (center alignment) + PWMA_SetPeriod(0xFF); // Counter direction, down:from [PWMA_ARRH,PWMA_ARRL] to 0 PWMA_SetCounterDirection(PWM_CounterDirection_Down); // Enable preload on reload-period - PWMA_SetAutoReloadPeriodPreload(HAL_State_ON); + PWMA_SetAutoReloadPreload(HAL_State_ON); // Enable output on PWMA.1P, PWMA.1N PWMA_SetPinOutputState(PWM_Pin_1|PWM_Pin_1N, HAL_State_ON); // Set PWMA.1 alternative ports to P1.0 and P1.1 @@ -66,11 +67,18 @@ void main(void) while(1) { PWMA_PWM1_SetCaptureCompareValue(dc); - UART1_TxHex(dc >> 8); - UART1_TxHex(dc & 0xFF); - dc++; + UART1_TxHex(0xFF); + if (dir) + { + dc++; + if (dc == 0xFF) dir = !dir; + } + else + { + dc--; + if (dc == 0) dir = !dir; + } UART1_TxString("\r\n"); - if (dc == 0xFF) dc = 0; SYS_Delay(10); } } \ No newline at end of file diff --git a/include/fw_pwm.h b/include/fw_pwm.h index f444979..4a1ebae 100644 --- a/include/fw_pwm.h +++ b/include/fw_pwm.h @@ -84,14 +84,14 @@ typedef enum * central alignment: * Fpwm = SYSCLK / (PWMx_PSCR + 1) / PWMx_ARR / 2 */ -#define PWMA_SetPrescaler(__16BIT_VAL__) do{ \ +#define PWMA_SetPrescaler(__16BIT_VAL__) do { \ P_SW2 = 0x80; \ (PWMA_PSCRH = ((__16BIT_VAL__) >> 8)); \ (PWMA_PSCRL = ((__16BIT_VAL__) & 0xFF)); \ P_SW2 = 0x00; \ }while(0) -#define PWMA_SetAutoReloadPeriod(__16BIT_VAL__) do{ \ +#define PWMA_SetPeriod(__16BIT_VAL__) do { \ P_SW2 = 0x80; \ (PWMA_ARRH = ((__16BIT_VAL__) >> 8)); \ (PWMA_ARRL = ((__16BIT_VAL__) & 0xFF)); \ @@ -107,24 +107,27 @@ typedef enum PWMA_ENO = PWMA_ENO & ~(__PINS__) | (((__STATE__) & 0x01)? (__PINS__) : 0x00); \ P_SW2 = 0x00; \ } while(0) + // Enable/Disable PWMB_BKR Control on Pins #define PWMA_SetPinBrakeControl(__PINS__, __STATE__) do { \ P_SW2 = 0x80; \ PWMA_IOAUX = PWMA_IOAUX & ~(__PINS__) | (((__STATE__) & 0x01)? (__PINS__) : 0x00); \ P_SW2 = 0x00; \ } while(0) + /** * 0: New period will be written to [PWMA_ARRH,PWMA_ARRL] and take effect immediately * 1: New period will be written to shadow register and loaded to [PWMA_ARRH,PWMA_ARRL] on next update event */ -#define PWMA_SetAutoReloadPeriodPreload(__STATE__) SFRX_ASSIGN(PWMA_CR1, 7, (__STATE__)) +#define PWMA_SetAutoReloadPreload(__STATE__) SFRX_ASSIGN(PWMA_CR1, 7, (__STATE__)) /** * Turn off counter (call PWMA_SetCounterState()) before changing to different alignment */ #define PWMA_SetEdgeAlignment(__ALIGN__) do{ \ - P_SW2 = 0x80;(PWMA_CR1 = PWMA_CR1 & ~(0x03 << 5) | ((__ALIGN__) << 5)); P_SW2 = 0x00; \ + P_SW2 = 0x80;(PWMA_CR1 = PWMA_CR1 & ~(0x03 << 5) | ((__ALIGN__) << 5));P_SW2 = 0x00; \ }while(0) + /** * 0: count from 0 to [PWMA_ARRH,PWMA_ARRL], then send an event and restart from 0 * 1: count from [PWMA_ARRH,PWMA_ARRL] to 0, then send an event and restart from [PWMA_ARRH,PWMA_ARRL] @@ -183,6 +186,7 @@ typedef enum PWMA_PortDirIn_TI2FP1_TI1FP2_TI4FP3_TI3FP4 = 0x10, PWMA_PortDirInTRC = 0x11, } PWMA_PortDirection_t; + #define PWMA_PWM1_SetPortDirection(__PORT_DIR__) do{ \ P_SW2 = 0x80;(PWMA_CCMR1 = PWMA_CCMR1 & ~(0x03 << 0) | ((__PORT_DIR__) << 0)); P_SW2 = 0x00; \ }while(0) @@ -209,16 +213,16 @@ typedef enum /** * Configurate PWMA.1 - PWMA.4 out mode */ -#define PWMA_PWM1_SetOutputMode(__MODE__) do{ \ +#define PWMA_PWM1_ConfigOutputMode(__MODE__) do{ \ P_SW2 = 0x80;(PWMA_CCMR1 = PWMA_CCMR1 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \ }while(0) -#define PWMA_PWM2_SetOutputMode(__MODE__) do{ \ +#define PWMA_PWM2_ConfigOutputMode(__MODE__) do{ \ P_SW2 = 0x80;(PWMA_CCMR2 = PWMA_CCMR2 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \ }while(0) -#define PWMA_PWM3_SetOutputMode(__MODE__) do{ \ +#define PWMA_PWM3_ConfigOutputMode(__MODE__) do{ \ P_SW2 = 0x80;(PWMA_CCMR3 = PWMA_CCMR3 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \ }while(0) -#define PWMA_PWM4_SetOutputMode(__MODE__) do{ \ +#define PWMA_PWM4_ConfigOutputMode(__MODE__) do{ \ P_SW2 = 0x80;(PWMA_CCMR4 = PWMA_CCMR4 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \ }while(0) @@ -311,22 +315,30 @@ typedef enum * central alignment: * Fpwm = SYSCLK / (PWMx_PSCR + 1) / PWMx_ARR / 2 */ -#define PWMB_SetPrescaler(__16BIT_PRESCALER__) do { \ +#define PWMB_SetPrescaler(__16BIT_VAL__) do { \ P_SW2 = 0x80; \ - (PWMB_PSCRH = ((__16BIT_PRESCALER__) >> 8)); \ - (PWMB_PSCRL = ((__16BIT_PRESCALER__) & 0xFF)); \ + (PWMB_PSCRH = ((__16BIT_VAL__) >> 8)); \ + (PWMB_PSCRL = ((__16BIT_VAL__) & 0xFF)); \ P_SW2 = 0x00; \ - } while(0) + }while(0) + +#define PWMB_SetPeriod(__16BIT_VAL__) do { \ + P_SW2 = 0x80; \ + (PWMB_ARRH = ((__16BIT_VAL__) >> 8)); \ + (PWMB_ARRL = ((__16BIT_VAL__) & 0xFF)); \ + P_SW2 = 0x00; \ + }while(0) // PWMA all pins input/output OFF/ON #define PWMB_SetOverallState(__STATE__) SFRX_ASSIGN(PWMB_BKR, 7, (__STATE__)) -// Enable/Disable PWMB Pins Output +// PWMB Pins Output OFF/ON #define PWMB_SetPinOutputState(__PINS__, __STATE__) do { \ P_SW2 = 0x80; \ PWMB_ENO = PWMB_ENO & ~(__PINS__) | (((__STATE__) & 0x01)? (__PINS__) : 0x00); \ P_SW2 = 0x00; \ } while(0) + // Enable/Disable PWMB_BKR Control on Pins #define PWMB_SetPinBrakeControl(__PINS__, __STATE__) do { \ P_SW2 = 0x80; \ @@ -335,17 +347,21 @@ typedef enum } while(0) /** - * 0:no preload, 1:enable auto preload + * 0: New period will be written to [PWMB_ARRH,PWMB_ARRL] and take effect immediately + * 1: New period will be written to shadow register and loaded to [PWMB_ARRH,PWMB_ARRL] on next update event */ -#define PWMB_SetAutoPreloadState(__STATE__) SFRX_ASSIGN(PWMB_CR1, 7, (__STATE__)) +#define PWMB_SetAutoReloadPreload(__STATE__) SFRX_ASSIGN(PWMB_CR1, 7, (__STATE__)) -#define PWMB_SetEdgeAlignment(__ALIGN__) do{ \ - P_SW2 = 0x80; \ - (PWMB_CR1 = PWMB_CR1 & ~(0x03 << 5) | ((__ALIGN__) << 5)); \ - P_SW2 = 0x00; \ - }while(0) /** - * 0: count upwards, 1: count downwards + * Turn off counter (call PWMB_SetCounterState()) before changing to different alignment +*/ +#define PWMB_SetEdgeAlignment(__ALIGN__) do{ \ + P_SW2 = 0x80;(PWMB_CR1 = PWMB_CR1 & ~(0x03 << 5) | ((__ALIGN__) << 5));P_SW2 = 0x00; \ + }while(0) + +/** + * 0: count from 0 to [PWMB_ARRH,PWMB_ARRL], then send an event and restart from 0 + * 1: count from [PWMB_ARRH,PWMB_ARRL] to 0, then send an event and restart from [PWMB_ARRH,PWMB_ARRL] */ #define PWMB_SetCounterDirection(__DIR__) SFRX_ASSIGN(PWMB_CR1, 4, (__DIR__)) /** @@ -364,11 +380,10 @@ typedef enum */ #define PWMB_SetNonUpdateEvent(__STATE__) SFRX_ASSIGN(PWMB_CR1, 1, (__STATE__)) /** - * 0:disable counter, 1:enable counter + * 0:stop counter, 1:start counter */ #define PWMB_SetCounterState(__STATE__) SFRX_ASSIGN(PWMB_CR1, 0, (__STATE__)) - /** * PWMB.1(PWM5) - PWMB.4(PWM8) io polar and on/off state */ @@ -410,6 +425,8 @@ typedef enum /** * PWMB.1 - PWMB.4 comparison value preload OFF/ON + * 0: New values will be written to PWMx_CCRx and take effect immediately + * 1: New values will be written to shadow register and loaded to PWMx_CCRx on next update event */ #define PWMB_PWM1_SetComparePreload(__STATE__) SFRX_ASSIGN(PWMB_CCMR1, 3, (__STATE__)) #define PWMB_PWM2_SetComparePreload(__STATE__) SFRX_ASSIGN(PWMB_CCMR2, 3, (__STATE__)) @@ -419,16 +436,16 @@ typedef enum /** * Configurate PWMB.1(PWM5) - PWMB.4(PWM8) output mode */ -#define PWMB_PWM1_SetOutputMode(__MODE__) do{ \ +#define PWMB_PWM1_ConfigOutputMode(__MODE__) do{ \ P_SW2 = 0x80;(PWMB_CCMR1 = PWMB_CCMR1 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \ }while(0) -#define PWMB_PWM2_SetOutputMode(__MODE__) do{ \ +#define PWMB_PWM2_ConfigOutputMode(__MODE__) do{ \ P_SW2 = 0x80;(PWMB_CCMR2 = PWMB_CCMR2 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \ }while(0) -#define PWMB_PWM3_SetOutputMode(__MODE__) do{ \ +#define PWMB_PWM3_ConfigOutputMode(__MODE__) do{ \ P_SW2 = 0x80;(PWMB_CCMR3 = PWMB_CCMR3 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \ }while(0) -#define PWMB_PWM4_SetOutputMode(__MODE__) do{ \ +#define PWMB_PWM4_ConfigOutputMode(__MODE__) do{ \ P_SW2 = 0x80;(PWMB_CCMR4 = PWMB_CCMR4 & ~(0x07 << 4) | ((__MODE__) << 4)); P_SW2 = 0x00; \ }while(0) diff --git a/include/fw_reg_base.h b/include/fw_reg_base.h index 7115fd2..d106df2 100644 --- a/include/fw_reg_base.h +++ b/include/fw_reg_base.h @@ -17,6 +17,7 @@ #if defined (SDCC) || defined (__SDCC) + #define __BIT __bit #define __IDATA __idata #define __XDATA __xdata #define __CODE __code @@ -30,6 +31,7 @@ #define NOP() __asm NOP __endasm #elif defined __CX51__ + #define __BIT bit #define __IDATA idata #define __XDATA xdata #define __CODE code @@ -47,13 +49,14 @@ #include #include # warning unrecognized compiler - # define __IDATA - # define __XDATA - # define __CODE - # define SBIT(name, addr, bit) volatile bool name - # define SFR(name, addr) volatile unsigned char name - # define SFRX(addr) (*(unsigned char volatile *)(addr)) - # define SFR16X(addr) (*(unsigned char volatile *)(addr)) + #define __BIT bool + #define __IDATA + #define __XDATA + #define __CODE + #define SBIT(name, addr, bit) volatile bool name + #define SFR(name, addr) volatile unsigned char name + #define SFRX(addr) (*(unsigned char volatile *)(addr)) + #define SFR16X(addr) (*(unsigned char volatile *)(addr)) #define INTERRUPT(name, vector) void name (void) #define INTERRUPT_USING(name, vector, regnum) void name (void) #define NOP() diff --git a/src/fw_uart.c b/src/fw_uart.c index ceb81a6..74175da 100644 --- a/src/fw_uart.c +++ b/src/fw_uart.c @@ -18,7 +18,7 @@ static const char hexTable[16] = { '0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F'}; char wptr, rptr, UART1_RxBuffer[UART_RX_BUFF_SIZE]; -__bit busy; +__BIT busy; /**************************************************************************** /