From 7a4ec0059d20aaf917cddcfb06dce8d176bd92f8 Mon Sep 17 00:00:00 2001 From: IOsetting Date: Sun, 16 Jan 2022 15:55:26 +0800 Subject: [PATCH] opt: add vrtrim and irtrim scan option in chipid demo --- demo/mem/mem_read_chipid.c | 40 +++++++++++++++++++++++----- demo/spi/nrf24l01/nrf24l01_stc8h1k.c | 4 +-- demo/spi/st7567/st7567_stc8h3k.c | 2 +- include/fw_util.h | 1 - src/fw_util.c | 26 ------------------ 5 files changed, 36 insertions(+), 37 deletions(-) diff --git a/demo/mem/mem_read_chipid.c b/demo/mem/mem_read_chipid.c index d6e4c88..45e6110 100644 --- a/demo/mem/mem_read_chipid.c +++ b/demo/mem/mem_read_chipid.c @@ -23,13 +23,8 @@ uint8_t __XDATA i, buff[32] = {0}; -void main(void) +void PrintBuff(void) { - SYS_SetClock(); - // UART1 configuration: baud 115200 with Timer2, 1T mode, no interrupt - UART1_Config8bitUart(UART1_BaudSource_Timer2, HAL_State_ON, 115200); - - MEM_ReadChipID(buff); for (i = 0; i < 32; i++) { UART1_TxHex(*(buff + i)); @@ -87,6 +82,37 @@ void main(void) UART1_TxString(", LIRTRIM:"); UART1_TxHex(LIRTRIM); UART1_TxString("\r\n\r\n"); +} - while(1); +void ItrimScan(uint8_t ircband, uint8_t vrtrim_limit, uint8_t irtrim_limit) +{ + uint8_t i = 0, j = 0; + while (i++ < vrtrim_limit) + { + j = 0; + while (j++ < irtrim_limit) + { + SYS_SetFOSC(ircband, i, j, 0); + SYS_Delay(10); + PrintBuff(); + } + } +} + +void main(void) +{ + SYS_SetClock(); + // UART1 configuration: baud 115200 with Timer2, 1T mode, no interrupt + UART1_Config8bitUart(UART1_BaudSource_Timer2, HAL_State_ON, 115200); + MEM_ReadChipID(buff); + PrintBuff(); + + while(1) + { + /** + * Uncomment this line if vrtrim and irtrim are unknown, + * this will scan all possible vrtrim and irtrim values between [0, 0xE0] + */ + //ItrimScan(__CONF_IRCBAND, 0xE0, 0xE0); + } } \ No newline at end of file diff --git a/demo/spi/nrf24l01/nrf24l01_stc8h1k.c b/demo/spi/nrf24l01/nrf24l01_stc8h1k.c index 0c7ff2c..bf24ddf 100644 --- a/demo/spi/nrf24l01/nrf24l01_stc8h1k.c +++ b/demo/spi/nrf24l01/nrf24l01_stc8h1k.c @@ -34,9 +34,9 @@ extern uint8_t __IDATA xbuf[NRF24_PLOAD_WIDTH + 1]; void SPI_Init(void) { - // ST7567 doesn't work if SPI frequency is too high + // SPI frequency SPI_SetClockPrescaler(SPI_ClockPreScaler_16); - // Clock idles low + // Clock is low when idle SPI_SetClockPolarity(HAL_State_OFF); // Data transfer is driven by lower SS pin SPI_SetClockPhase(SPI_ClockPhase_LeadingEdge); diff --git a/demo/spi/st7567/st7567_stc8h3k.c b/demo/spi/st7567/st7567_stc8h3k.c index 9189119..25c5259 100644 --- a/demo/spi/st7567/st7567_stc8h3k.c +++ b/demo/spi/st7567/st7567_stc8h3k.c @@ -34,7 +34,7 @@ void SPI_Init(void) { // ST7567 doesn't work if SPI frequency is too high SPI_SetClockPrescaler(SPI_ClockPreScaler_16); - // Clock idles low + // Clock is low when idle SPI_SetClockPolarity(HAL_State_OFF); // Data transfer is driven by lower SS pin SPI_SetClockPhase(SPI_ClockPhase_LeadingEdge); diff --git a/include/fw_util.h b/include/fw_util.h index bf13c3c..e0982bb 100644 --- a/include/fw_util.h +++ b/include/fw_util.h @@ -25,6 +25,5 @@ void UTIL_Uart1_33M1776_115200_Init(void); void UTIL_Uart1_35M_9600_Init(void); void UTIL_Uart1_36M864_9600_Init(void); void UTIL_Uart1_36M864_115200_Init(void); -// void UTIL_ItrimScan(uint8_t ircband, uint8_t *str); #endif diff --git a/src/fw_util.c b/src/fw_util.c index 97173d0..b1eec9b 100644 --- a/src/fw_util.c +++ b/src/fw_util.c @@ -99,29 +99,3 @@ void UTIL_Uart1_36M864_115200_Init(void) ET1 = 0; TR1 = 1; } - -/* -void UTIL_ItrimScan(uint8_t ircband, uint8_t vrtrim, uint8_t irtrim_limit, uint8_t *str) -{ - uint8_t i = irtrim_limit, j; - do - { - j = 3; - do - { - SYS_SetFOSC(ircband, vrtrim, i, j); - SYS_Delay(1); - UART1_TxHex(IRCBAND); - UART1_TxChar(' '); - UART1_TxHex(VRTRIM); - UART1_TxChar(' '); - UART1_TxHex(IRTRIM); - UART1_TxChar(0x20); - UART1_TxHex(LIRTRIM); - UART1_TxChar(0x20); - UART1_TxString(str); - SYS_Delay(10); - } while (j--); - } while (i--); -} -*/ \ No newline at end of file