feat: adc demos
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3a42e4a8bd
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72
demo/adc/adc_interrupt_10bit.c
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72
demo/adc/adc_interrupt_10bit.c
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// Copyright 2021 IOsetting <iosetting@outlook.com>
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/**
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* STC8H3K64S2
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* AGrnd -> GND
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* AVcc -> VCC
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* AVref -> VCC
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* Vcc -> VCC
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* Gnd -> GND
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* ADC1 -> Test voltage
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*
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* STC8H1K08
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* AVref -> VCC
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* Vcc -> VCC
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* Gnd -> GND
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* ADC1 -> Test voltage
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*/
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#include "fw_hal.h"
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uint16_t res;
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INTERRUPT(ADC_Routine, EXTI_VectADC)
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{
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ADC_ClearInterrupt();
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res = ADC_RESL;
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res |= (ADC_RES & 0x0F) << 8;
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// Restart ADC for continuous sampling
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ADC_Start();
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}
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void main(void)
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{
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SYS_Init();
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// For debug print
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UART1_ConfigMode1Dyn8bitUart(UART1_BaudSource_Timer2, HAL_State_ON, 115200, HAL_State_OFF);
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// Set ADC1(GPIO P1.1) HIP
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GPIO_P1_SetMode(GPIO_Pin_1, GPIO_Mode_Input_HIP);
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// Channel: ADC1
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ADC_SetChannel(0x01);
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// ADC Clock = SYSCLK / 2 / (1+15) = SYSCLK / 32
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ADC_SetSpeed(0x0F);
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// Right alignment, high 2-bit in ADC_RES, low 8-bit in ADC_RESL
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ADC_SetResultAlignmentRight();
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// Enable interrupts
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EXTI_Global_SetIntState(HAL_State_ON);
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EXTI_ADC_SetIntState(HAL_State_ON);
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// Turn on ADC power
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ADC_SetPowerState(HAL_State_ON);
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while(1)
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{
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ADC_Start();
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UART1_TxString("Result: ");
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UART1_TxHex(res >> 8);
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UART1_TxHex(res & 0xFF);
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UART1_TxString("\r\n");
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SYS_Delay(100);
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}
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}
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94
demo/adc/adc_interrupt_2ch.c
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94
demo/adc/adc_interrupt_2ch.c
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// Copyright 2021 IOsetting <iosetting@outlook.com>
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/**
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* STC8H3K64S2
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* AGrnd -> GND
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* AVcc -> VCC
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* AVref -> VCC
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* Vcc -> VCC
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* Gnd -> GND
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* ADC1 -> Test voltage
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*
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* STC8H1K08
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* AVref -> VCC
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* Vcc -> VCC
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* Gnd -> GND
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* ADC1 -> Test voltage
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*/
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#include "fw_hal.h"
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uint8_t pos;
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uint16_t res[2];
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INTERRUPT(ADC_Routine, EXTI_VectADC)
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{
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ADC_ClearInterrupt();
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res[pos] = ADC_RESL;
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res[pos] |= (ADC_RES & 0x0F) << 8;
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// Restart ADC for continuous sampling
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pos = (pos+1) & 0x1;
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if (pos == 0)
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{
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/**
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* Uncomment these lines in high speed ADC
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GPIO_P1_SetMode(GPIO_Pin_1, GPIO_Mode_Output_OD);
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GPIO_P1_SetMode(GPIO_Pin_1, GPIO_Mode_Input_HIP);
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*/
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ADC_SetChannel(0x01);
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}
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else
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{
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/**
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* Uncomment these lines in high speed ADC
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GPIO_P1_SetMode(GPIO_Pin_2, GPIO_Mode_Output_OD);
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GPIO_P1_SetMode(GPIO_Pin_2, GPIO_Mode_Input_HIP);
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*/
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ADC_SetChannel(0x02);
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}
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ADC_Start();
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}
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void main(void)
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{
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SYS_Init();
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// For debug print
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UART1_ConfigMode1Dyn8bitUart(UART1_BaudSource_Timer2, HAL_State_ON, 115200, HAL_State_OFF);
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// Channel: ADC1
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ADC_SetChannel(0x01);
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// ADC Clock = SYSCLK / 2 / (1+15) = SYSCLK / 32
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ADC_SetSpeed(0x0F);
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// Right alignment, high 2-bit in ADC_RES, low 8-bit in ADC_RESL
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ADC_SetResultAlignmentRight();
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// Enable interrupts
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EXTI_Global_SetIntState(HAL_State_ON);
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EXTI_ADC_SetIntState(HAL_State_ON);
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// Turn on ADC power
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ADC_SetPowerState(HAL_State_ON);
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// Set ADC1(P1.1), ADC2(P1.2) HIP
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GPIO_P1_SetMode(GPIO_Pin_1|GPIO_Pin_2, GPIO_Mode_Input_HIP);
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ADC_Start();
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while(1)
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{
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UART1_TxString("Result: ");
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UART1_TxHex(res[0] >> 8);
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UART1_TxHex(res[0] & 0xFF);
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UART1_TxChar(' ');
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UART1_TxHex(res[1] >> 8);
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UART1_TxHex(res[1] & 0xFF);
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UART1_TxString("\r\n");
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SYS_Delay(100);
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}
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}
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65
demo/adc/adc_poll_10bit.c
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65
demo/adc/adc_poll_10bit.c
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// Copyright 2021 IOsetting <iosetting@outlook.com>
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/**
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* STC8H3K64S2
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* AGrnd -> GND
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* AVcc -> VCC
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* AVref -> VCC
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* Vcc -> VCC
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* Gnd -> GND
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* ADC1 -> Test voltage
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*
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* STC8H1K08
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* AVref -> VCC
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* Vcc -> VCC
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* Gnd -> GND
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* ADC1 -> Test voltage
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*/
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#include "fw_hal.h"
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void main(void)
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{
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uint16_t res;
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SYS_Init();
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// For debug print
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UART1_ConfigMode1Dyn8bitUart(UART1_BaudSource_Timer2, HAL_State_ON, 115200, HAL_State_OFF);
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// Set ADC1(GPIO P1.1) HIP
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GPIO_P1_SetMode(GPIO_Pin_1, GPIO_Mode_Input_HIP);
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// Channel: ADC1
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ADC_SetChannel(0x01);
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// ADC Clock = SYSCLK / 2 / (1+1) = SYSCLK / 4
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ADC_SetSpeed(0x01);
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// Right alignment, high 2-bit/4-bit in ADC_RES, low 8-bit in ADC_RESL
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ADC_SetResultAlignmentRight();
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// Turn on ADC power
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ADC_SetPowerState(HAL_State_ON);
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while(1)
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{
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ADC_Start();
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NOP();
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NOP();
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while (!ADC_SamplingUnfinished());
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ADC_ClearInterrupt();
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/*
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res = ADC_RESL;
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res |= (ADC_RES & 0x0F) << 8;
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*/
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UART1_TxHex(ADC_RES);
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UART1_TxHex(ADC_RESL);
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UART1_TxString("\r\n");
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SYS_Delay(100);
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}
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}
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63
demo/adc/adc_poll_8bit.c
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63
demo/adc/adc_poll_8bit.c
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// Copyright 2021 IOsetting <iosetting@outlook.com>
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/**
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* STC8H3K64S2
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* AGrnd -> GND
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* AVcc -> VCC
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* AVref -> VCC
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* Vcc -> VCC
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* Gnd -> GND
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* ADC1 -> Test voltage
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*
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* STC8H1K08
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* AVref -> VCC
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* Vcc -> VCC
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* Gnd -> GND
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* ADC1 -> Test voltage
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*/
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#include "fw_hal.h"
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void main(void)
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{
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uint8_t res;
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SYS_Init();
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// For debug print
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UART1_ConfigMode1Dyn8bitUart(UART1_BaudSource_Timer2, HAL_State_ON, 115200, HAL_State_OFF);
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// Set ADC1(GPIO P1.1) HIP
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GPIO_P1_SetMode(GPIO_Pin_1, GPIO_Mode_Input_HIP);
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// Channel: ADC1
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ADC_SetChannel(0x01);
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// ADC Clock = SYSCLK / 2 / (1+1) = SYSCLK / 4
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ADC_SetSpeed(0x01);
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// Left alignment, high 8-bit in ADC_RES
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ADC_SetResultAlignmentLeft();
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// Turn on ADC power
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ADC_SetPowerState(HAL_State_ON);
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while(1)
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{
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ADC_Start();
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NOP();
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NOP();
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while (!ADC_SamplingUnfinished());
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ADC_ClearInterrupt();
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res = ADC_RES;
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UART1_TxString("Result: ");
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UART1_TxHex(res);
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UART1_TxString("\r\n");
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SYS_Delay(100);
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}
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}
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@ -19,8 +19,9 @@
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#include "fw_types.h"
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#include "fw_types.h"
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#define ADC_SetPowerState(__STATE__) SFR_ASSIGN(ADC_CONTR, 7, __STATE__)
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#define ADC_SetPowerState(__STATE__) SFR_ASSIGN(ADC_CONTR, 7, __STATE__)
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#define ADC_Start SFR_SET(ADC_CONTR, 6)
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#define ADC_Start() SFR_SET(ADC_CONTR, 6)
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#define ADC_ClearInterrupt SFR_RESET(ADC_CONTR, 5)
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#define ADC_SamplingUnfinished() (ADC_CONTR & (0x01 << 5))
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#define ADC_ClearInterrupt() SFR_RESET(ADC_CONTR, 5)
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#define ADC_SetPWMTriggerState(__STATE__) SFR_ASSIGN(ADC_CONTR, 4, __STATE__)
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#define ADC_SetPWMTriggerState(__STATE__) SFR_ASSIGN(ADC_CONTR, 4, __STATE__)
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/**
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/**
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* ADC input channels selection
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* ADC input channels selection
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* 10-bit in [ADC_RES,ADC_RESL]: STC8H1K28,STC8H1K08
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* 10-bit in [ADC_RES,ADC_RESL]: STC8H1K28,STC8H1K08
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* 12-bit in [ADC_RES,ADC_RESL]: STC8H3K64S4,STC8H3K64S2,STC8H8K64U,STC8H2K64T,STC8H4K64TLR,STC8H4K64TLCD,STC8H4K64LCD
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* 12-bit in [ADC_RES,ADC_RESL]: STC8H3K64S4,STC8H3K64S2,STC8H8K64U,STC8H2K64T,STC8H4K64TLR,STC8H4K64TLCD,STC8H4K64LCD
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*/
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*/
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#define ADC_SetResultAlignmentLeft SFR_RESET(ADCCFG, 5)
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#define ADC_SetResultAlignmentLeft() SFR_RESET(ADCCFG, 5)
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#define ADC_SetResultAlignmentright SFR_SET(ADCCFG, 5)
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#define ADC_SetResultAlignmentRight() SFR_SET(ADCCFG, 5)
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/**
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/**
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* ADC conversion speed calculation:
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* ADC conversion speed calculation:
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@ -23,6 +23,7 @@
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#include "fw_gpio.h"
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#include "fw_gpio.h"
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#include "fw_tim.h"
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#include "fw_tim.h"
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#include "fw_uart.h"
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#include "fw_uart.h"
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#include "fw_adc.h"
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#include "fw_util.h"
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#include "fw_util.h"
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#endif
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#endif
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# define SFR16X(addr) (*(unsigned char volatile *)(addr))
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# define SFR16X(addr) (*(unsigned char volatile *)(addr))
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#define INTERRUPT(name, vector) void name (void)
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#define INTERRUPT(name, vector) void name (void)
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#define INTERRUPT_USING(name, vector, regnum) void name (void)
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#define INTERRUPT_USING(name, vector, regnum) void name (void)
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#define NOP() ()
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#define NOP()
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#endif
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#endif
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