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opt: rename ADC_SetClockPrescaler()

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This commit is contained in:
IOsetting 2022-01-08 23:58:12 +08:00
parent 2e14c6415d
commit 470b0ec2f9
5 changed files with 15 additions and 9 deletions
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2
demo/adc/adc_interrupt_10bit.c
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@ -50,7 +50,7 @@ void main(void)
// Channel: ADC1
ADC_SetChannel(0x01);
// ADC Clock = SYSCLK / 2 / (1+15) = SYSCLK / 32
ADC_SetSpeed(0x0F);
ADC_SetClockPrescaler(0x0F);
// Right alignment, high 2-bit in ADC_RES, low 8-bit in ADC_RESL
ADC_SetResultAlignmentRight();
// Enable interrupts

2
demo/adc/adc_interrupt_2ch.c
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@ -68,7 +68,7 @@ void main(void)
// Channel: ADC1
ADC_SetChannel(0x01);
// ADC Clock = SYSCLK / 2 / (1+15) = SYSCLK / 32
ADC_SetSpeed(0x0F);
ADC_SetClockPrescaler(0x0F);
// Right alignment, high 2-bit in ADC_RES, low 8-bit in ADC_RESL
ADC_SetResultAlignmentRight();
// Enable interrupts

2
demo/adc/adc_poll_10bit.c
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@ -40,7 +40,7 @@ void main(void)
// Channel: ADC1
ADC_SetChannel(0x01);
// ADC Clock = SYSCLK / 2 / (1+1) = SYSCLK / 4
ADC_SetSpeed(0x01);
ADC_SetClockPrescaler(0x01);
// Right alignment, high 2-bit/4-bit in ADC_RES, low 8-bit in ADC_RESL
ADC_SetResultAlignmentRight();
// Turn on ADC power

2
demo/adc/adc_poll_8bit.c
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@ -40,7 +40,7 @@ void main(void)
// Channel: ADC1
ADC_SetChannel(0x01);
// ADC Clock = SYSCLK / 2 / (1+1) = SYSCLK / 4
ADC_SetSpeed(0x01);
ADC_SetClockPrescaler(0x01);
// Left alignment, high 8-bit in ADC_RES
ADC_SetResultAlignmentLeft();
// Turn on ADC power

16
include/fw_adc.h
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@ -59,14 +59,20 @@
#define ADC_SetResultAlignmentRight() SFR_SET(ADCCFG, 5)
/**
* ADC conversion speed calculation:
* 10-bit ADC Frequency ＝ SYSCLK / 2 / (SPEED + 1) / [(Switch + 1) + (Hold + 1) + (Sample + 1) + 10]
* 12-bit ADC Frequency ＝ SYSCLK / 2 / (SPEED + 1) / [(Switch + 1) + (Hold + 1) + (Sample + 1) + 12]
* Time of one complete ADC conversion:
* 10-bit ADC: (Switch + 1) + (Hold + 1) + (Sample + 1) + 10
* 12-bit ADC: (Switch + 1) + (Hold + 1) + (Sample + 1) + 12
*
* ADC conversion frequency:
* 10-bit ADC Frequency ＝ SYSCLK / 2 / (__PRESCALER__ + 1) / [(Switch + 1) + (Hold + 1) + (Sample + 1) + 10]
* 12-bit ADC Frequency ＝ SYSCLK / 2 / (__PRESCALER__ + 1) / [(Switch + 1) + (Hold + 1) + (Sample + 1) + 12]
*
*/
/**
* ADC clock = SYSclk/2/(SPEED+1)
* ADC clock = SYSclk/2/(__PRESCALER__+1)
*/
#define ADC_SetSpeed(__SPEED__) (ADCCFG = ADCCFG & ~0x0F | ((__SPEED__) << 0))
#define ADC_SetClockPrescaler(__PRESCALER__) (ADCCFG = ADCCFG & ~0x0F | ((__PRESCALER__) << 0))
/**
* Channel switch time,