137 lines
4.2 KiB
C
137 lines
4.2 KiB
C
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// Copyright 2021 IOsetting <iosetting(at)outlook.com>
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef ___FW_CMP_H___
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#define ___FW_CMP_H___
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#include "fw_conf.h"
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#include "fw_types.h"
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/**
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* STC8 MCU analog comparator
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*
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* 2P: 2 positive input options
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* 4P: 4 positive input options
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*
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* | | 2P+2N | 4P+2N |
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* | STC8G1K08 | Y | |
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* | STC8G1K08-8Pin | N | |
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* | STC8G1K08A | N | |
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* | STC8G2K64S4 | Y | |
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* | STC8G2K64S2 | Y | |
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* | STC8G1K08T | Y | |
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* | STC15H2K64S4 | Y | |
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* | STC8H1K08 | Y | |
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* | STC8H1K28 | Y | |
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* | STC8H3K64S4 | Y | |
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* | STC8H3K64S2 | Y | |
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* | STC8H2K64T | Y | |
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* | STC8H8K64U | | Y |
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* | STC8H4K64TLR | | Y |
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* | STC8H4K64TLCD | | Y |
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* | STC8H4K64LCD | | Y |
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*/
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typedef enum
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{
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CMP_OLD_PositiveInput_P37 = 0x00,
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CMP_OLD_PositiveInput_ADC = 0x01,
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} CMP_OLD_PositiveInput_t;
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typedef enum
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{
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CMP_OLD_NegativeInput_RefV = 0x00,
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CMP_OLD_NegativeInput_P36 = 0x01,
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} CMP_OLD_NegativeInput_t;
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typedef enum
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{
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CMP_PositiveInput_P37 = 0x00,
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CMP_PositiveInput_P50 = 0x01,
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CMP_PositiveInput_P51 = 0x02,
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CMP_PositiveInput_ADC = 0x03,
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} CMP_PositiveInput_t;
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typedef enum
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{
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CMP_NegativeInput_P36 = 0x00,
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CMP_NegativeInput_RefV = 0x01,
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} CMP_NegativeInput_t;
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typedef enum
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{
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CMP_Hysteresis_0mV = 0x00,
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CMP_Hysteresis_10mV = 0x01,
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CMP_Hysteresis_20mV = 0x02,
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CMP_Hysteresis_30mV = 0x03,
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} CMP_Hysteresis_t;
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#define CMP_SetEnabled(__STATE__) SFR_ASSIGN(CMPCR1, 7, __STATE__)
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#define CMP_ClearInterrupt() SFR_ASSIGN(CMPCR1, 6)
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/**
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* for 2P+2N series.
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* Set positive input pin, 0:P36, 1:ADC
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*/
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#define CMP_OLD_SetPositiveInput(__INPUT__) SFR_ASSIGN(CMPCR1, 3, __INPUT__)
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/**
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* for 4P+2N series.
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* Set positive input pin, 0:P36, 1:P50, 2:P51, 3:ADC
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*/
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#define CMP_SetPositiveInput(__INPUT__) do{ \
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SFRX_ON(); \
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CMPEXCFG = CMPEXCFG & ~(0x03) | (__INPUT__ & 0x03); \
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SFRX_OFF(); \
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} while(0)
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/**
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* for 2P+2N series.
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* Set negative input pin, 0:1.19V ref, 1:P36
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*/
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#define CMP_OLD_SetNegativeInput(__INPUT__) SFR_ASSIGN(CMPCR1, 2, __INPUT__)
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/**
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* for 4P+2N series.
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* Set negative input pin, 0:P36, 1:1.19Vref
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*/
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#define CMP_SetNegativeInput(__INPUT__) SFRX_ASSIGN(CMPEXCFG, 2, __INPUT__)
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/**
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* Result output
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* 0:no output, 1:output to P34 or P41
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*/
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#define CMP_SetResultOutputState(__STATE__) SFR_ASSIGN(CMPCR1, 1, __STATE__)
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#define CMP_ReadResultOutput() (CMPCR1 & 0x01)
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/**
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* 0: P34/P41 output high when result is 1
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* 1: P34/P41 output low when result is 1
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*/
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#define CMP_SetResultOutputInvert(__STATE__) SFR_ASSIGN(CMPCR2, 7, __STATE__)
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/**
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* 0: Enable 0.1us analog filter
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* 1: Disable 0.1us analog filter
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*/
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#define CMP_SetFilterDisabled(__STATE__) SFR_ASSIGN(CMPCR2, 6, __STATE__)
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/**
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* Comparator result will be delayed for (__CLOCKS__ + 2) clocks
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*/
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#define CMP_SetDebouncingClocks(__CLOCKS__) CMPCR2 = CMPCR2 & ~(0x3F) | (__CLOCKS__ & 0x3F)
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/**
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* Set comparator hysteresis for producing stable switching behavior.
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*/
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#define CMP_SetHysteresis(__HYST__) do{ \
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SFRX_ON(); \
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CMPEXCFG = CMPEXCFG & ~(0x03 << 6) | (__HYST__ << 6); \
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SFRX_OFF(); \
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} while(0)
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#endif
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