108 lines
4.6 KiB
C
108 lines
4.6 KiB
C
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// Copyright 2021 IOsetting <iosetting(at)outlook.com>
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef ___FW_I2C_H___
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#define ___FW_I2C_H___
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#include "fw_conf.h"
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#include "fw_types.h"
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typedef enum
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{
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I2C_WorkMode_Slave = 0x00,
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I2C_WorkMode_Master = 0x01,
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} I2C_WorkMode_t;
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typedef enum
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{
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I2C_MasterCmd_Wait = 0x00, // Wait, idle
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I2C_MasterCmd_Start = 0x01, // START
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I2C_MasterCmd_Send = 0x02, // Send data
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I2C_MasterCmd_RxAck = 0x03, // Recive Ack
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I2C_MasterCmd_Recv = 0x04, // Recive data
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I2C_MasterCmd_TxAck = 0x05, // Send Ack
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I2C_MasterCmd_Stop = 0x06, // STOP
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I2C_MasterCmd_StartSendRxAck = 0x09, // START + Send data + RxAck
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I2C_MasterCmd_SendRxAck = 0x0A, // Send data + RxAck
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I2C_MasterCmd_RecvTxAck0 = 0x0B, // Receive data + TxAck(0)
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I2C_MasterCmd_RecvNAck = 0x0C, // Receive data + NAck
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} I2C_MasterCmd_t;
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typedef enum
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{
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// SCL SDA
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I2C_AlterPort_P15_P14 = 0x00,
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I2C_AlterPort_P25_P24 = 0x01,
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I2C_AlterPort_P77_P76 = 0x02,
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I2C_AlterPort_P32_P33 = 0x03,
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} I2C_AlterPort_t;
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#define I2C_SetEnabled(__STATE__) SFRX_ASSIGN(I2CCFG, 7, __STATE__)
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#define I2C_SetWorkMode(__MODE__) SFRX_ASSIGN(I2CCFG, 6, __MODE__)
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/**
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* I2C bus clock = SYSCLK / 2 / (__DIV__ * 2 + 4)
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* __DIV__ values range [0, 63]
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*/
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#define I2C_SetClockPrescaler(__DIV__) do { \
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SFRX_ON(); \
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(I2CCFG) = (I2CCFG) & ~(0x3F) | ((__DIV__) & 0x3F); \
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SFRX_OFF(); \
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} while(0)
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#define I2C_SendMasterCmd(__CMD__) { \
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(I2CMSCR) = (I2CMSCR) & ~(0x0F) | ((__CMD__) & 0x0F); \
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while (!(I2CMSST & 0x40)); \
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I2CMSST &= ~0x40; \
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}
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#define I2C_MasterStart() do{SFRX_ON();I2C_SendMasterCmd(I2C_MasterCmd_Start);SFRX_OFF();}while(0)
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#define I2C_MasterSendData(__DATA__) do{SFRX_ON();I2CTXD = (__DATA__); I2C_SendMasterCmd(I2C_MasterCmd_Send);SFRX_OFF();}while(0)
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#define I2C_MasterRxAck() do{SFRX_ON();I2C_SendMasterCmd(I2C_MasterCmd_RxAck);SFRX_OFF();}while(0)
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#define I2C_MasterAck() do{SFRX_ON();I2CMSST &= ~(0x01); I2C_SendMasterCmd(I2C_MasterCmd_TxAck);SFRX_OFF();}while(0)
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#define I2C_MasterNAck() do{SFRX_ON();I2CMSST |= 0x01; I2C_SendMasterCmd(I2C_MasterCmd_TxAck);SFRX_OFF();}while(0)
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#define I2C_MasterStop() do{SFRX_ON();I2C_SendMasterCmd(I2C_MasterCmd_Stop);SFRX_OFF();}while(0)
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/**
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* If enabled, `Send Data`+`RxAck` will be executed automatically after write operation on I2CTXD
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*/
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#define I2C_SetMasterAutoSend(__STATE__) SFRX_ASSIGN(I2CMSAUX, 0, __STATE__)
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/**
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* Call P_SW2=0x80 before invoking this
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*/
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#define I2C_IsMasterBusy() (I2CMSST & 0x80)
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#define I2C_ClearMasterCmdInterrupt() do {SFRX_ON(); I2CMSST &= ~(0x01 << 6); SFRX_OFF();} while(0)
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#define I2C_ResetSlaveMode() SFRX_SET(I2CSLCR, 0)
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/**
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* Call P_SW2=0x80 before invoking this
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*/
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#define I2C_IsSlaveBusy() (I2CSLST & 0x80)
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#define I2C_ClearSlaveStartInterrupt() do {SFRX_ON(); I2CSLST &= ~(0x01 << 6); SFRX_OFF();} while(0)
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#define I2C_ClearSlaveRecvInterrupt() do {SFRX_ON(); I2CSLST &= ~(0x01 << 5); SFRX_OFF();} while(0)
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#define I2C_ClearSlaveSendInterrupt() do {SFRX_ON(); I2CSLST &= ~(0x01 << 4); P_SW2 = 0x00;} while(0)
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#define I2C_ClearSlaveStopInterrupt() do {SFRX_ON(); I2CSLST &= ~(0x01 << 3); P_SW2 = 0x00;} while(0)
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#define I2C_SetSlaveAddrControl(__STATE__) SFRX_ASSIGN(I2CSLADR, 0, __STATE__)
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/**
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* Alternative ports
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*/
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#define I2C_SetPort(__ALTER_PORT__) (P_SW2 = P_SW2 & ~(0x03 << 4) | ((__ALTER_PORT__) << 4))
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uint8_t I2C_MasterRecv(void);
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uint8_t I2C_Write(uint8_t devAddr, uint8_t memAddr, uint8_t *dat, uint16_t size);
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#endif
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