2021-12-30 16:09:36 +01:00
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// Copyright 2021 IOsetting <iosetting(at)outlook.com>
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2021-12-30 05:19:02 +01:00
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/**
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* STC8H3K64S2
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* AGrnd -> GND
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* AVcc -> VCC
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* AVref -> VCC
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* Vcc -> VCC
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* Gnd -> GND
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* ADC1 -> Test voltage
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*
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* STC8H1K08
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* AVref -> VCC
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* Vcc -> VCC
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* Gnd -> GND
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* ADC1 -> Test voltage
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*/
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#include "fw_hal.h"
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uint16_t res;
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INTERRUPT(ADC_Routine, EXTI_VectADC)
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{
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ADC_ClearInterrupt();
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res = ADC_RESL;
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res |= (ADC_RES & 0x0F) << 8;
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// Restart ADC for continuous sampling
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ADC_Start();
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}
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void main(void)
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{
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2021-12-30 15:48:21 +01:00
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SYS_SetClock();
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2021-12-30 05:19:02 +01:00
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// For debug print
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2021-12-30 17:28:03 +01:00
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UART1_ConfigMode1Dyn8bitUart(UART1_BaudSource_Timer2, HAL_State_ON, 115200);
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2021-12-30 05:19:02 +01:00
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// Set ADC1(GPIO P1.1) HIP
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GPIO_P1_SetMode(GPIO_Pin_1, GPIO_Mode_Input_HIP);
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// Channel: ADC1
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ADC_SetChannel(0x01);
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// ADC Clock = SYSCLK / 2 / (1+15) = SYSCLK / 32
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ADC_SetSpeed(0x0F);
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// Right alignment, high 2-bit in ADC_RES, low 8-bit in ADC_RESL
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ADC_SetResultAlignmentRight();
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// Enable interrupts
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EXTI_Global_SetIntState(HAL_State_ON);
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EXTI_ADC_SetIntState(HAL_State_ON);
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// Turn on ADC power
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ADC_SetPowerState(HAL_State_ON);
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while(1)
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{
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ADC_Start();
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UART1_TxString("Result: ");
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UART1_TxHex(res >> 8);
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UART1_TxHex(res & 0xFF);
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UART1_TxString("\r\n");
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SYS_Delay(100);
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}
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}
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