This commit is contained in:
qitas 2020-12-18 11:23:48 +08:00
parent 8f9bebdde1
commit 54a373aa98
3 changed files with 64 additions and 2 deletions

1
.gitignore vendored
View File

@ -1,3 +1,4 @@
*.pyc
*.hex
.pio/
.vscode/

View File

@ -38,6 +38,5 @@
同系列中升级[CH554](http://www.wch.cn/products/CH554.html)将增加支持USB HOST主机模式
降低规格可选[CH551](http://www.wch.cn/products/CH551.html)ROM降为10K片内xRAM为512字节异步串口仅提供UART0仅SOP16封装并且去掉了ADC模数转换模块和USB type-C模块
### [SoC芯平台](http://www.SoC.Xin)
### [www.SoC.xin(芯)](http://www.SoC.Xin)

62
index.json Normal file
View File

@ -0,0 +1,62 @@
{
"name":"CH552",
"series":["CH552P","CH551P"],
"type":"MCU",
"Core":"8051",
"Freq":"24MHz",
"description":"WCH 1T 8051 CH552 MCU",
"peripheral": ["ADC","DAC","USB","RTC","UART","SUART","I2C","I2S","SPI","AES","DMA"],
"package":["LQFP48","QFN28","SOP16"],
"SRAM":8,
"Flash":64,
"UART": {
"num": 3,
"FIFO": 16,
"ISO7816": 1,
"more":["BUAD","LIN","IrDA"]
},
"ADC": {
"num": 1,
"PGA": 4,
"channel": 16,
"resolution": 12,
"rate": 2400
},
"TIM": {
"resolution":[16,16,16,16,32],
"rate": 1024
},
"RCC": {
"HSI": 16384,
"LSI": 32,
"HSE": [1024,20480],
"PLL": [32768,49152],
"accuracy": 0.02,
"rate": 1024
},
"USB": {
"num": 1,
"more":["FS","device"]
},
"RTC": {
"CLK": 32768,
"PPM": 1.5,
"Ivdd": 0.5
},
"PWR": {
"VDD": [1850,5500],
"Ivdd": 3.5,
"rate": 1024
},
"upload": {
"ISP": true,
"IAP": true,
"SWD": true,
"speed": 115200
},
"vendor":"WCH",
"url":"http://www.SoC.xin/CH552",
"repo":"https://github.com/SoCXin/CH552",
"homepage": "http://www.wch.cn/products/CH552.html",
"version":"1.0.0"
}